SRAM Scaling Issues, And What Comes Next


The inability of SRAM to scale has challenged power and performance goals forcing the design ecosystem to come up with strategies that range from hardware innovations to re-thinking design layouts. At the same time, despite the age of its initial design and its current scaling limitations, SRAM has become the workhorse memory for AI. SRAM, and its slightly younger cousin DRAM, have always co... » read more

IC Package Physical Design Best Practices


Historically IC package design has been a relatively simple task which allowed the die bumps to be fanned out on a package substrate to a floorplan geometry suitable for connecting to a printed circuit board (PCB). But today the industry is moving to disaggregation of traditional monolithic SoC functions into chiplets often interfaced with local high-speed memory to avoid silicon reticle limits... » read more

Memory’s Future Hinges On Reliability


Experts at the Table: Semiconductor Engineering sat down to talk about the impact of power and heat on off-chip memory, and what can be done to optimize performance, with Frank Ferro, group director, product management at Cadence; Steven Woo, fellow and distinguished inventor at Rambus; Jongsin Yun, memory technologist at Siemens EDA; Randy White, memory solutions program manager at Keysight; a... » read more

An Empirical Comparison Of Optimizers For Quantum Machine Learning With SPSA-Based Gradients


Variational quantum algorithms (VQAs) have attracted a lot of attention from the quantum computing community for the last few years. Their hybrid quantum-classical nature with relatively shallow quantum circuits makes them a promising platform for demonstrating the capabilities of noisy intermediate scale quantum (NISQ) devices. Although the classical machine learning community focuses on gradi... » read more

How To Build Computer Vision Solutions


Computer vision devices that can ‘see’ and act on visual information are bringing new efficiencies and functionalities to IoT. But with new opportunities come complexities. The specific features and functionality of smart vision use cases vary widely. Creating a system that catches defects on an assembly line requires different imaging, machine learning, and workloads compared to one ... » read more

Fluid Kinematics Using Ansys Fluent


This teaching package covers fluid kinematics topics. It includes description of fluid motion, introducing different co-ordinate systems used to mathematically calculate fluid flow behaviors and demonstrating different flow visualization and flow measurement techniques used in experimental methods and numerical simulations. Ansys Fluent has been utilized visualize these concepts. Click here ... » read more

Early Architecture Performance And Power Analysis Of Multi-Die Systems


A multi-die system is a semiconductor device in which multiple homogeneous or heterogeneous dies are contained within a single package. Multi-die systems have been available for select uses for years, but they are gaining wider popularity and are expected to be used in a wide variety of end applications, including high-performance computing, automotive, and mobile. There are two main factors dr... » read more

Sigrity X — Redefining Signal And Power Integrity


This white paper highlights the features in Cadence Sigrity X signal and power integrity (SI/PI) solutions for system-level SI and PI analysis that enable designers to cut the number of design respins and meet short time-to-market windows with confidence. Click here to read more. » read more

Private Delegated Computations Using Strong Isolation


Computations are now routinely delegated to third-parties. In response, Confidential Computing technologies are being added to microprocessors offering a trusted execution environment (TEE) that provides confidentiality and integrity guarantees to code and data hosted within—even in the face of a privileged attacker. TEEs, along with an attestation protocol, permit remote third-parties to est... » read more

Research Bits: Feb. 13


Fast phase-change memory Researchers from Stanford University, TSMC, National Institute of Standards and Technology (NIST), and University of Maryland developed a new phase-change memory for future AI and data-centric systems. It is based on GST467, an alloy of four parts germanium, six parts antimony, and seven parts tellurium, which is sandwiched between several other nanometer-thin material... » read more

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