Startup Funding: September 2023


Chip-to-chip and data center I/O drew investor interest in September, including support for several startups developing Compute Express Link (CXL) solutions. Elsewhere in the data center, several large rounds went to companies developing AI accelerators. And at the edge, startups are building unique ways to handle AI at very little power by initially processing data directly at the sensor. O... » read more

Research Bits: October 3


Growing indium selenide at scale Researchers from the University of Pennsylvania, Brookhaven National Laboratory, and the Air Force Research Laboratory grew the 2D semiconductor indium selenide (InSe) on a full-size, industrial-scale wafer. It can also be deposited at temperatures low enough to integrate with a silicon chip. The team noted that producing large enough films of InSe has prove... » read more

Chip Industry Week In Review


By Susan Rambo, Liz Allan, and Gregory Haley. TSMC rolled out the second version of its 3Dblox, which creates an infrastructure for stacking chiplets and other necessary components in a package, along with a standardized way of achieving that. Two novel features are chiplet mirroring for design reuse, and what is basically sandbox for power and thermal analysis of different design elements. ... » read more

Research Bits: September 26


2D waveguides Researchers from the University of Chicago found that a sheet of glass crystal just a few atoms thick could trap and carry light efficiently up to a centimeter. In tests, the researchers found they could use extremely tiny prisms, lenses, and switches to guide the path of the light along a chip. “We were utterly surprised by how powerful this super-thin crystal is; not on... » read more

ReRAM Seeks To Replace NOR


Resistive RAM is gaining renewed attention as demand for faster and cheaper non-volatile memory alternatives continues to grow, particularly in applications such as automotive. Embedded flash has long left designers wishing for better write speeds and lower energy consumption, but as the leading edge of that technology shrunk to 28nm, another problem arose. Manufacturing flash memory at thos... » read more

Chip Industry Week In Review


By Jesse Allen, Karen Heyman, and Liz Allan The U.S. Department of Defense (DOD) announced $238 million in awards toward establishing eight regional innovation hubs under the CHIPS and Science Act. The hubs aim to accelerate hardware prototyping and "lab-to-fab" transition of semiconductor technologies for secure edge/IoT, 5G/6G, AI hardware, quantum technology, electromagnetic warfare, and ... » read more

Research Bits: September 19


Measuring lithography plasma sources Researchers from the University of Twente developed a tool that can measure the size of a plasma source and the color of the light it emits simultaneously, which they say could be used to improve lithography machines. “Traditionally, we could only look at the amount of light produced, but to further improve the chipmaking process, we also want to study... » read more

Chip Industry Week In Review


By Gregory Haley, Jesse Allen, and Liz Allan TSMC told equipment vendors to delay deliveries of the most advanced tools due to uncertain demand, according to Reuters. The news drove down stock prices of all the major equipment providers. On the other hand, TSMC said advanced packaging shortages will constrain AI chip shipments for the next 18 months, according to NikkeiAsia. The United St... » read more

Reliability On The Rise In IC Design


Reliability has been an important factor in the semiconductor industry for decades. A closer look reveals three main priorities: In the area of technology development and optimization, the microscopic mechanisms that lead to degradation must be identified and understood before they can be fixed. Microanalytical methods are used here as well as TCAD simulations. If it’s not possible to... » read more

Using Virtual Metal Fill To Predict The Impact Of High Level Nets


A recent blog post discussed the use of virtual metal fill (VMF) to predict the effects of real metal fill when performing RC extraction on a chip layout. This enables static timing analysis (STA) closely correlated with final post-fill results without incurring the time to perform the actual metal fill insertion during the layout-STA loop. VMF is fast enough to be run in every iteration of thi... » read more

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