How Low Can You Go? Pushing The Limits Of Transistors


Rising demand for cutting-edge mobile, IoT, and wearable devices, along with high compute demands for AI and 5G/6G communications, has driven the need for lower power systems-on-chip (SoCs). This is not only a concern for a device’s power consumption when active (dynamic power), but also when the device is not active (leakage power). This highly competitive industry provides significant rewar... » read more

Research Bits: Nov. 7


ADC side-channel attacks Researchers at MIT propose two ways to protect analog-to-digital converters (ADCs) from power and electromagnetic side-channel attacks. The researchers first investigated the side-channel attacks that could be used against ADCs. Power attacks usually involve an attacker soldering a resistor onto the device’s circuit board to measure its power usage. An electromagn... » read more

Startup Funding: October 2022


Investors poured $3.5 billion into 113 startup companies in October 2022, especially new battery technology, AI hardware, and faster memory access. Battery technology dominated the fundraising in October thanks to the U.S. Department of Energy and four funding rounds that exceeded $200M. The DOE awarded sizeable grants to help 20 companies, including six startups, build out battery material ... » read more

What’s So Different About Interposer Signal Integrity?


By Kelly Damalou and Pete Gasperini To achieve gains in power, performance, area, and cost, 3D-IC architectures are pushing electronics design to new limits. Silicon integration technology and associated devices have undergone an impressive evolution over the last several decades. Their development encourages technological advancement in applications like high-performance computing, Artificial... » read more

Research Bits: Oct. 25


Polarization for photonic processor Researchers from the University of Oxford and University of Exeter developed a photonic processor that uses multiple polarization channels, increasing information density. "We all know that the advantage of photonics over electronics is that light is faster and more functional over large bandwidths. So, our aim was to fully harness such advantages of phot... » read more

Research Bits: Oct. 18


Modular AI chip Engineers at the Massachusetts Institute of Technology (MIT), Harvard University, Stanford University, Lawrence Berkeley National Laboratory, Korea Institute of Science and Technology, and Tsinghua University created a modular approach to building stackable, reconfigurable AI chips. The design comprises alternating layers of sensing and processing elements, along with LEDs t... » read more

HBM3 In The Data Center


Frank Ferro, senior director of product management at Rambus, talks about the forthcoming HBM3 standard, why this is so essential for AI chips and where the bottlenecks are today, what kinds of challenges are involved in working with this memory, and what impact chiplets and near-memory compute will have on HBM and bandwidth.     » read more

Complex Tradeoffs In Inferencing Chips


Designing AI/ML inferencing chips is emerging as a huge challenge due to the variety of applications and the highly specific power and performance needs for each of them. Put simply, one size does not fit all, and not all applications can afford a custom design. For example, in retail store tracking, it's acceptable to have a 5% or 10% margin of error for customers passing by a certain aisle... » read more

Foundational Changes In Chip Architectures


We take many things in the semiconductor world for granted, but what if some of the decisions made decades ago are no longer viable or optimal? We saw a small example with finFETs, where the planar transistor would no longer scale. Today we are facing several bigger disruptions that will have much larger ripple effects. Technology often progresses in a linear fashion. Each step provides incr... » read more

Designing A Better Clock Network


Laying the proper clock network architecture foundation makes all the difference for the best performance, power, and timing of a chip, particularly in advanced node SoCs packed with billions of transistors. Each transistor, which acts like a standard cell, needs a clock. An efficient clock network should ensure the switching transistors save power. In today’s advanced nodes, when a design... » read more

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