Week In Review: Design, Low Power

Keysight buys Cliosoft; Renesas’ 1-chip transmitter; Arteris’ next-gen NoC; RISC-V verification.


Keysight Technologies acquired Cliosoft, add IP data management and design data to Keysight’s EDA portfolio. “The bigger vision is how we’re going to manage silicon lifecycle, from spec to tape-out. So you can have a data management and IP management layer and visibility into that data, and that ties into Keysight’s design and test software,” said Simon Rance, vice president of marketing at Cliosoft. “The bigger vision is how to scale to chiplets and beyond, to the point where you have a physical product.”

Products & deals

Renesas announced a single-chip transmitter (Tx) that can directly measure both DC and AC power transmission components and which has adaptive Zero-Voltage Switching (ZVS) to reduce electromagnetic interference (EMI). Used for mobile device charging, the company presented its advancements at the International Solid-State Circuits Conference (ISSCC) in San Francisco this week. The chip handles 15W with a Qi power receiver (PRx) and up to 40W with proprietary PRx solutions. It can also detect when metal foreign metal object is in the system between the transmitter and receiver, which could be unsafe.

Renesas also worked with AMD on the design of 5G active antenna systems (AAS) radios, which have full RF and digital front-end.

Arteris launched its next-generation FlexNoC 5 IP, a physically aware network-on-chip (NoC) that helps teams shorten or eliminate some of the manual steps and iterations in placing the IP. FlexNoC 5 also expands support for Arm AMBA 5 protocols and IEEE 1685 IP-XACT, including a connectivity flow with Arteris Magillem for NoC integration with other SoC IP blocks.

RISC-V processors, which until several years ago were considered auxiliary processors for specific functions, now have support for an entirely different type of role — high-performance computing.

Ambarella’s new automotive AI central domain controller CV3-AD685 system-on-chip (SoC) will be using Samsung Foundry’s 5nm process technology. The CV3-AD685 will be used in ADAS.

Ventana Micro is using Imperas’s simulation tools for RISC-V processor verification.

Keysight Technologies and Singapore University of Technology and Design (SUTD) signed a memorandum of understanding (MoU) to collaborate on Open RAN (O-RAN), 6G Technology, research, development, and education.

IP reuse via chiplets appears to be an effective and feasible solution, and a potentially low-cost alternative to shrinking everything to the latest process node. Common IP or technology that already has been silicon-proven can be used. Here’s how this works.


Siemens Digital Industries Software is sponsoring a multi-year Academic Chair at Centrale Nantes University (”Centrale Nantes”) which helps the university continue its research into Smoothed-Particle Hydrodynamics (SPH). Centrale Nantes will also continue its computational fluid dynamics (CFD) simulation research to enhance Siemens’ Simcenter software. Siemens relationship with Centrale Nantes began with Siemens’ 2020 acquisition of Nextflow Software, which had a relationship with Centrale Nantes and used its research.

Northwestern University and Argonne National Laboratory are using smaller devices, called Waggle devices, to collect local climate data around the world. The devices are powered by NVIDIA Jetson-driven edge computing, which NVIDIA describes in a blog.

Upcoming Events

  • HPCA 2023: IEEE International Symposium on High-Performance Computer Architecture, February 25 – March 1
  • SPIE Advanced Lithography + Patterning, February 26 – March 2
  • DVCON U.S. 2023 (Design & Verification), February 27 – March 2
  • SPIE: Advances in Patterning Materials and Processes XL, February 27 – March 1
  • International Semiconductor Executive Summit. March 7 – 8
  • Wide-Bandgap Developer Forum, March 9
  • 19th Annual Device Packaging Conference (DPC 2023), March 13 – 16
  • Embedded World 2023, March 14 – 16
  • IRPS 2023 – International Reliability Physics Symposium, March 26 – 30
  • International Symposium on Physical Design (ISPD), March 26 – 29
  • Tiny ML Summit 2023, March 27 – 29
  • MEMCon 2023, March 28 – 29
  • SNUG Silicon Valley (Santa Clara, California), March 29 – 30

Further reading

Check out the latest Low Power-High Performance and Systems & Design newsletters for these highlights and more:

  • Special Report — Taming Corner Explosion In Complex Chips
  • Is RISC-V Ready For Supercomputing?
  • Disaggregating And Extending Operating Systems
  • Chiplets Taking Root As Silicon-Proven Hard IP
  • Tech Talk — Where Power Is Spent In HBM
  • Leveraging Data To Improve Productivity
  • Dealing With Performance Bottlenecks In SoCs
  • Will AI Take My Job?

If you’d like to receive Semiconductor Engineering newsletters and alerts via email, subscribe here.

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