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Effectively Managing Maintenance Cost For Low-Touch IPs


Semiconductor design houses are in a race to differentiate themselves by integrating and delivering more functionality in their SoCs while addressing the common concerns of power, performance and cost. This global race has led to a steep rise in the number of design IPs integrated in any given SoC. As generations of SoCs are churned out, some of the design IPs repeatedly used in them reach a... » read more

Cloud Drives Changes In Network Chip Architectures


Cloud data centers have changed the networking topology and how data moves throughout a large data center, prompting significant changes in the architecture of the chips used to route that data and raising a whole new set of design challenges. Cloud computing has emerged as the fast growing segment of the data center market. In fact, it is expected to grow three-fold in the next few years, a... » read more

Minimizing Chip Aging Effects


Aging kills semiconductors, and it is a growing problem for an increasing number of semiconductor applications—especially as they migrate to more advanced nodes. Additional analysis and prevention methods are becoming necessary for safety critical applications. While some aspects of aging can be mitigated up front, others are tied to the operation of the device. What can an engineering tea... » read more

More Sigmas In Auto Chips


The journey to autonomous cars is forcing fundamental changes in the way chips are designed, tested and tracked, from the overall system functionality to the IP that goes into those systems. This includes everything from new requirements for automotive-grade chips to longer mean time between failures. But it also makes it far more challenging, time-consuming and complicated to create these d... » read more

The Darker Side Of Consolidation


Another wave of consolidation is underway in the semiconductor industry, setting the stage for some high-stakes competitive battles over market turf and sowing confusion across the supply chain about continued support throughout a product's projected lifetime. The consolidation comes as chipmakers already are grappling with rising complexity, the loss of a roadmap for future designs as Moore... » read more

Don’t Be The Dinosaur On IP Reuse


In today’s competitive marketplace, IP assets are becoming more critical and strategic than ever before. There is a general understanding among all design companies that one needs to invest and reuse IPs within the enterprise for faster realization of an IP sub-system or an SoCs. Unfortunately, from the start most companies have failed to adopt the processes for developing and reusing their I... » read more

designHUB: Design Reuse Made Real


It’s no secret: You can’t get to market quickly or efficiently without integrating and re-using IP technology in your system-on-chip (SoC) design. In the past 10 years alone, design re-use has doubled to the point where today you’ll find more than 150 reused blocks comprising 60-70% of the die area in an average SoC. The companies most successful with their IP-reuse strategies are thos... » read more

Progress And Chaos On Road To Autonomy


Progress in the development of fully autonomous vehicles is incremental and slow, but not for lack of effort. Research and development in self-driving cars is under way all around the globe, from the biggest automotive manufacturers and their Tier 1 suppliers to companies not traditionally involved in the automotive industry. Add to that fleets of startups working on sensor technologies and ... » read more

More Nodes, New Problems


The rollout of leading-edge process nodes is accelerating rather than slowing down, defying predictions that device scaling would begin to subside due to rising costs and the increased difficulty of developing chips at those nodes. Costs are indeed rising. So are the number of design rules, which reflect skyrocketing complexity stemming from multiple patterning, more devices on a chip, and m... » read more

IP Issues At 10/7nm


For years chip makers have been demanding more options to assist them in getting silicon to market faster. As of 2018, there are now so many possibilities for chip makers that engineering teams of all types are having trouble wading through all the possibilities. To make matters worse, many of today’s choices now come with unexpected and often unwanted caveats. At the most advanced nodes... » read more

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