tag: RISC-V

RISC-V And GPU Synergy In Practice: A Path Toward High-Performance SoCs
By Ke Xu - 04 Jun, 2026 - Comments: 0

With the rapid growth of edge AI and high-performance computing demands, the division of roles within the processor industry is beginning to shift. Recent moves from the dominant CPU IP supplier has increased industry attention on the openness and ecosystem neutrality of the supply chain. Against this backdrop, the value of RISC-V CPU IP is becoming more evident. It offers chipmakers greater... » read more

Evaluating and Calibrating Performance On RISC-V Vector Processors (KTH, LLNL, BSC)
By Technical Paper Link - 18 May, 2026 - Comments: 0

A new technical paper, "Closer in the Gap: Towards Portable Performance on RISC-V Vector Processors," was published by researchers at KTH Royal Institute of Technology, Lawrence Livermore National Laboratory, and Barcelona Supercomputing Center. Abstract "The RISC-V Vector Extension~(RVV) is a cornerstone for supporting compute throughout in scientific and machine learning workloads. Yet ... » read more

Pre-Silicon Verification and Validation Methodology Targeting Robust RISC-V Chip Designs (BSC)
By Technical Paper Link - 05 May, 2026 - Comments: 0

A new technical paper, "Verification and Validation (V&V)-in-the-Loop for RISC-V Design: The Holistic Vision of BZL," was published by researchers at Barcelona Supercomputing Center. Abstract "The Barcelona Zetascale Lab (BZL) project aims to strengthening Europe's capacity in the design and manufacture of RISC-V based high-performance computing chips. In this context, we present a ho... » read more

A New Era For Co-Processing
By Brian Bailey - 09 Apr, 2026 - Comments: 0

Key Takeaways: There is no single processor capable of executing everything efficiently, meaning that multiple processors are required. Maximum efficiency is gained by minimizing the movement of data. Architects must maximize efficiency for today's workloads, while also adding enough flexibility to handle tomorrow's. New processor architectures are rapidly evolving thanks to... » read more

Detecting Architectural Vulnerabilities in Closed-Source RISC-V CPUs (CISPA)
By Technical Paper Link - 17 Feb, 2026 - Comments: 0

The paper "RISCover: Automatic Discovery of User-exploitable Architectural Security Vulnerabilities in Closed-Source RISC-V CPUs" was published by researchers at CISPA Helmholtz Center for Information Security. Abstract "The open and extensible RISC-V instruction set has enabled many new CPU vendors and implementations, but most commercial CPUs are closed-source, significantly hindering vul... » read more

Chip Industry Week In Review
By The SE Staff - 13 Feb, 2026 - Comments: 0

Geopolitics U.S. lawmakers are urging tighter export controls on advanced semiconductor manufacturing equipment (SME) to China, warning existing loopholes threaten national security. "China is working to build domestic SME by exploiting access to U.S. and allied subcomponents required to produce tools," states the letter, which also says better coordination with allies is essential. The U.S.... » read more

Does Your RISC-V Core Meet The Standard?
By Brian Bailey - 29 Jan, 2026 - Comments: 0

Key Takeaways Architectural conformance and implementation verification are necessary but different for RISC-V designs, yet few verification engineers have experience on the conformance side. While RISC-V enables flexibility, there is a potential for ecosystem fragmentation. It is mathematically impossible to test every instruction combination, so engineers are moving beyond just "bl... » read more

Will 2026 Be Dominated By AI?
By Brian Bailey - 15 Jan, 2026 - Comments: 0

Many opportunities and problems became highly interlinked in 2025, fueled by the historic growth in everything AI. But how close are we coming to breaking points, and what are people doing to mitigate them? That is the story that will unfold this year. AI's penetration into an increasing number of workloads is placing almost quadratic demands on compute, memory, interconnect, and the archite... » read more

Two-Stage Hardware Fuzzer (TU Darmstadt)
By Technical Paper Link - 01 Jan, 2026 - Comments: 0

A new technical paper titled "GoldenFuzz: Generative Golden Reference Hardware Fuzzing" was published by researchers at TU Darmstadt. Abstract "Modern hardware systems, driven by demands for high performance and application-specific functionality, have grown increasingly complex, introducing large surfaces for bugs and security-critical vulnerabilities. Fuzzing has emerged as a scalable sol... » read more

Tracking Your Preferences
By Brian Bailey - 23 Dec, 2025 - Comments: 0

I like to use my last blog of the year to focus on you, the reader. You provide valuable feedback to me and the rest of the team at Semiconductor Engineering. What do you want to see us write about? How in-depth should things be? This is always a balance between the amount of information provided and the rate at which readers tire with an article. My focus is the channels I write for – Sys... » read more

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