Week In Review: Design, Low Power


Nvidia completed its $7 billion acquisition of Mellanox. The acquisition, initially announced over a year ago, brings Mellanox’s high-performance networking and interconnect technology to Nvidia's server efforts and gives the company full end-to-end offerings in the data center space. To date, this is the largest acquisition in Nvidia's history. Tools & IP Synopsys debuted its 3DIC Co... » read more

Week In Review: Design, Low Power


M&A Intel acquired Habana Labs, a maker of programmable deep learning accelerators for the data center, for approximately $2 billion. Based in Israel, Habana was founded in 2016 but only emerged from stealth in September 2018 with the release of its first inference chip. Intel's VC arm, Intel Capital, previously invested in the startup. Intel has made numerous M&A moves in the AI space... » read more

Week In Review: Design, Low Power


Accellera formed the Universal Verification Methodology Analog/Mixed-Signal Working Group (UVM-AMS WG), which will work to develop a standard that will provide a unified analog/mixed-signal verification methodology based on UVM to improve the verification of AMS integrated circuits and systems. “Our objective is to standardize a method to drive and monitor analog/mixed-signal nets within UVM,... » read more

Week In Review: Design, Low Power


M&A eSilicon will be acquired by Inphi Corporation and Synopsys. Inphi is acquiring the majority of the company, including the ASIC business and 56/112G SerDes design and related IP, for $216 million in both cash and the assumption of debt. Inphi expects to combine its DSP, TiA, Driver and SiPho products with eSilicon’s 2.5D packaging and custom silicon design capabilities for electro-optics... » read more

Week in Review: IoT, Security, Automotive


Connectivity, 5G Rambus has revealed a PCI Express 5.0 interface on advanced 7nm finFET process node for heterogenous computing aimed at performance-intensive uses, such as AI, data center, HPC, storage and 400GbE networking. With a PHY and a digital controller core recently acquired Northwest Logic, the interface has 32 GT/s (gigatransfers per second) bandwidth per lane with 128 GB/s bandwidt... » read more

Week In Review: Design, Low Power


Allegro DVT acquired Amphion Semiconductor, bringing together two developers of video codec IP. Allegro DVT said the merger will make it the first semiconductor IP company to offer commercially available hardware-based, real-time encoder and decoder solutions for the new AV1 video encoding format for SoC implementations, supporting 4K/UHD up to 8K. Based in Belfast, Northern Ireland, Amphion wa... » read more

Week in Review: IoT, Security, Autos


Products/Services The Networking for Autonomous Vehicles Alliance announces that Marvell Semiconductor is joining the NAV Alliance following its acquisition of Aquantia. Fourteen companies are in the industry organization, including Bosch, Continental, Nvidia, and Volkswagen. “The NAV Alliance is developing the platforms that will create the future of transportation and we believe that Multi... » read more

Week In Review: Design, Low Power


M&A Dialog Semiconductor will acquire Creative Chips for approximately $80 million cash, with contingent consideration of up to $23 million. The move will expand Dialog's Industrial IoT portfolio, adding Creative Chips' industrial Ethernet and other mixed-signal products for connecting large numbers of IIoT sensors to industrial networks. Based in Bingen, Germany, Creative Chips was founded in... » read more

Week in Review – IoT, Security, Autos


Products/Services Arm TechCon got under way with a series of announcements. Arm is a founding member of the Autonomous Vehicle Computing Consortium, along with General Motors, Toyota Motor, DENSO, Continental, Bosch, NXP Semiconductors, and Nvidia. More information on the consortium is available here. “Imagine a world where vehicles are able to perceive their dynamically changing environment... » read more

Advanced Packaging Options Increase


Designing, integrating and assembling heterogeneous packages from blocks developed at any process node or cost point is proving to be far more difficult than expected, particularly where high performance is one of the main criteria. At least part of the problem is there is a spectrum of choices, which makes it hard to achieve economies of scale. Even where there is momentum for a particular ... » read more

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