Week In Review: Design, Low Power


Tools OneSpin unveiled a set of formal apps for development and assessment of RISC-V cores. The RISC-V Integrity Verification Solution formalizes the RISC-V ISA in a set of SystemVerilog Assertions to verify compliance for the ISA is met. It provides a formal bug absence core assessment environment for unbounded proofs and systematic discovery of all hidden instructions or unintended side effe... » read more

Week in Review: IoT, Security, Auto


Internet of Things Cattle ranchers in Australia are using solar-powered ear tags to keep track of their herds, connecting through LoRa technology to locate their bulls, cows, heifers, and steers. SODAQ of the Netherlands and Lacuna Space of the U.K. are providing the Internet of Things technology and satellite-based LoRa connectivity to make this possible. “The main differentiator for LoRa o... » read more

Week In Review: Design, Low Power


M&A QuickLogic acquired SensiML Corporation. Founded in 2017 as a spin-off from Intel, SensiML provides a Software-as-a-Service suite for developing pattern matching sensor algorithms optimized for ultra-low power consumption using machine learning. Details of the deal were not disclosed, though QuickLogic will fund it with shares of common stock. IP CEVA debuted an all-purpose, hybrid... » read more

Week In Review: Design, Low Power


Cadence taped out a complete GDDR6 memory IP solution consisting of PHY, controller and Verification IP on Samsung's 7LPP process. The GDDR6 IP allows up to 16Gb/sec bandwidth per pin, or over 500Gb/sec peak bandwidth between the SoC and each GDDR6 memory die. It is targeted at very high-bandwidth applications including AI, cryptocurrency mining, graphics, ADAS and HPC. ClioSoft debuted a So... » read more

Week In Review: Design, Low Power


Tools & Standards Mentor uncorked a PCB design platform for non-specialist PCB engineers focused on multi-dimensional verification. The Xpedition platform can integrate a range of verification tools within a singular authoring environment, providing automatic model creation, concurrent simulation, cross probing from results, and error reviews to identify problems at the schematic or layout... » read more

Week In Review: Design, Low Power


Tools OneSpin launched a formal verification tool that integrates with all major simulators, coverage databases and viewers, and chip design verification planning tools to provide a comprehensive view of verification progress. Comprised of two new formal apps, it can identify unreachable coverage points and provide them to the simulator to reduce wasted effort. Synopsys released the latest ... » read more

FD-SOI Going Mainstream


Semiconductor Engineering sat down to discuss changes in the FD-SOI world and what's behind them, with James Lamb, deputy CTO for advanced semiconductor manufacturing and corporate technical fellow at Brewer Science; Giorgio Cesana, director of technical marketing at STMicroelectronics; Olivier Vatel, senior vice president and CTO at Screen Semiconductor Solutions; and Carlos Mazure, CTO at Soi... » read more

Week In Review: Design, Low Power


CAST debuted an IP subsystem implementing the latest IEEE standards for Time Sensitive Networking (TSN) over Ethernet. The TSN_CTRL Subsystem combines three IP cores, a time synchronizer, traffic shaper, and Ethernet MAC. It implements a hardware subsystem that operates without software assistance once programmed. The IP communicates timing information to the system, and allows the system to de... » read more

Week In Review: Design, Low Power


M&A Siemens acquired Austemper Design Systems, which provides tools for functional safety and safety-critical designs. Founded in 2015, Texas-based Austemper adds state-of-the-art safety analysis, auto-correction and fault simulation technology to address random hardware faults, as well as correct and harden vulnerable areas, subsequently performing fault simulation to ensure the design is... » read more

The Week In Review: Design


M&A MIPS has reportedly been acquired again, this time by AI startup Wave Computing. Wave focuses on data center-based neural network training using its parallel dataflow processing architecture. In March, the company signed on to use 64-bit multi-threaded processor cores from MIPS in future projects. Previously, MIPS was owned by Tallwood Venture Capital, which acquired MIPS from Imaginat... » read more

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