Ready For Nanoimprint?


Nanoimprint has been discussed, debated, and hyped since the term was first introduced in 1996. Now, a full 20 years later, it is being taken much more seriously in light of increasing photomask costs and delays in bringing alternatives to market. Nanoimprint lithography is something like a room-temperature UV cure embossing process. The structures are patterned onto a template or mold using... » read more

Where Is Next-Gen Lithography?


Semiconductor Engineering sat down to discuss lithography and photomask technologies with Greg McIntyre, director of the Advanced Patterning Department at [getentity id="22217" comment="Imec"]; Harry Levinson, senior fellow and senior director of technology research at [getentity id="22819" comment="GlobalFoundries"]; Uday Mitra, vice president and head of strategy and marketing for the Etch Bu... » read more

3D Construction Ahead


One of the interesting features of Photonics West is that it covers the full spectrum, from academic research to industrial research to new products in the commercial exhibits. This range of interrelated ideas was on show in 3D fabrication. At one extreme, the latest research in scanning multi-spot three-photon patterning showed 3D structures 100μm thick with 50nm features. Researchers als... » read more

Behind The Scenes In Nanoimprint Lithography


Doug Resnick, VP of marketing and business development at Canon Nanotechnologies, talks about why Canon bought Molecular Imprints, the surprises behind that acquisition, and the problems faced by the semconductor industry moving forward. [youtube vid=NJTxFu-_6GI] » read more

After Smartphones…Less?


As the rate of growth for smartphone sales slow, questions arise regarding the impact that slower growth will have throughout the semiconductor supply chain. Over the past decade, the 1 billion-plus smartphone market has driven the need for more advanced manufacturing process technologies, new input materials and the need for more fab capacity. It has even legitimized new players into the suppl... » read more

Inside The OSAT Business


Semiconductor Engineering sat down to discuss the IC-packaging industry, foundries, China and other topics with Tien Wu, chief operating officer at Taiwan's Advanced Semiconductor Engineering (ASE), the world's largest outsourced semiconductor assembly and test (OSAT) vendor. What follows are excerpts of that conversation. SE: What is your overall outlook for 2016? Wu: Last year, the semi... » read more

Reducing Post-Placement Leakage With Stress-Enhanced Fill Cells


By Valeriy Sukharev, Jun-Ho Choy, Armen Kteyan and Henrik Hovsepyan As downward scaling of transistors continues, optimizing power consumption for mobile devices is a major concern. Power consumption consists of two components: dynamic and static. Dynamic (active) power is used while the chip is performing various functions, while static (leakage) power is consumed by leakage current (Figure... » read more

Insider’s Guide To Photomasks


Semiconductor Engineering sat down to talk about photomasks and lithography with Franklin Kalk, executive vice president of technology at Toppan Photomasks, a merchant photomask supplier. What follows are excerpts of that conversation. SE: What’s hot in mask technology these days? Kalk: It’s everything from the bleeding-edge like EUV to much more mature manufacturing. On the mature si... » read more

Will Directed Self-Assembly Pattern 14nm DRAM?


Will directed self-assembly (DSA) join Extreme Ultraviolet (EUV) Lithography and next-generation multi-patterning techniques to pattern the next memory and logic technologies? Appealing to the wisdom of crowds, the organizers of the 2015 1st International DSA symposium recently surveyed the attendees. Nearly 75% believed DSA would insert into high-volume manufacturing within the next 5 years... » read more

3D NAND Flash Processing


Coventor’s powerful SEMulator3D semiconductor process modeling platform offers a wide range of technology development capabilities for the development of cutting edge 3D NAND Flash Technology. 3D NAND promises high memory cell density with reduced data corruption, but also brings processing challenges. The structural complexity and inherent 3D nature of devices using 3D NAND require a predict... » read more

← Older posts Newer posts →