category: Manufacturing, Packaging and Materials

category: IoT, Security & Automotive

The Big Shift
By Ed Sperling - 18 Feb, 2016 - Comments: 0

The number of chipmakers that truly can differentiate their products by moving to the next process node is falling, and that pool will continue to shrink even further over the next few years. Processor companies such as Intel and IBM always will benefit from scaling and architectural changes. So will GPU companies such as Nvidia, and FPGA vendors such as Xilinx, Microsemi and Altera (now par... » read more

1xnm DRAM Challenges
By Mark LaPedus - 18 Feb, 2016 - Comments: 3

At a recent event, Samsung presented a paper that described how the company plans to extend today’s planar DRAMs down to 20nm and beyond. This is an amazing feat. Until very recently, most engineers believed DRAMs would stop scaling at 20nm or so. Instead, Samsung is ramping up the world’s most advanced DRAMs—a line of 20nm parts—with plans to go even further. Micron and SK Hynix soo... » read more

Consolidation Hits OSAT Biz
By Mark LaPedus - 18 Feb, 2016 - Comments: 0

The outsourced semiconductor assembly and test (OSAT) industry is undergoing a new wave of acquisition activity that will dramatically reshape the packaging and test services markets. [getkc id="83" kc_name="OSATs"] have seen a considerable amount of consolidation over the years, but the industry needs a scorecard to keep track of the recent deals and the resulting fallout. One OSAT deal inv... » read more

Internet of FD-SOI Things?
By Katherine Derbyshire - 18 Feb, 2016 - Comments: 0

Are fully-depleted silicon-on-insulator (FD-SOI) wafers having a moment? Certainly SOI wafers are not new. Soitec’s SmartCut layer transfer technology was patented in 1994, and wafers with implanted oxide layers were available before that. Still, adoption of SOI wafers has been limited. Though they offer improved device isolation and reduced parasitics, the increased wafer cost has been an ob... » read more

Memory Lane: Far From A Leisurely Stroll
By Joanne Itow - 18 Feb, 2016 - Comments: 0

The only semiconductor market segment that has not been taken over by the foundries and still remains dominated by IDMs is the memory sector. The memory market is the last bastion for true IDM manufacturers, who must be savvy in the changing trends in end market applications, advanced technology development, and must still determine how much and when to invest in additional capacity. With on... » read more

LVS Boxing Helps Designers Knock Out Designs Quickly
By Mentor, a Siemens Business - 18 Feb, 2016 - Comments: 0

Keeping up with the constant demand for better, faster design flow performance while preserving the original layout hierarchy of a design can be very challenging during design verification. Designers must constantly manage tradeoffs between performance, database size, and accuracy. In the early design cycle, using the LVS boxing capabilities of Calibre nmLVS to replace incomplete or missing blo... » read more

When And How Should I Color My DP layout?
By David Abercrombie - 18 Feb, 2016 - Comments: 0

Designers working with advanced process technologies that require double patterning often find themselves puzzling over the best way to setup or optimize their design flows to ensure their layouts can be decomposed without time-wasting mistakes. Because manual coloring can be challenging even for experienced engineers, many prefer to use automated coloring solutions. But when is the best time a... » read more

12 Nations Sign Trade Partnership
By SEMI - 18 Feb, 2016 - Comments: 0

By Taylor Sholler Last week, twelve nations across the Pacific-Rim came together to sign the Trans-Pacific Partnership (TPP) in Auckland New Zealand. These economies, making-up roughly 40 percent of the world's GDP, include Australia, Brunei, Canada, Chile, Japan, Malaysia, Mexico, New Zealand, Peru, Singapore, the U.S., and Vietnam. One of the largest trade agreements in history, the TPP will... » read more

An Insider’s Guide To Planar And 3D DRAM
By Mark LaPedus - 18 Feb, 2016 - Comments: 0

Semiconductor Engineering sat down to talk about planar DRAMs, 3D DRAMs, scaling and systems design with Charles Slayman, technical leader of engineering at network equipment giant Cisco Systems. What follows are excerpts of that conversation. SE: What types of DRAM do network equipment OEMs look at or buy these days? Slayman: When we look at DRAM, we look at it for networking applicatio... » read more

The Economics Of Moore’s Law
By Imec - 18 Feb, 2016 - Comments: 0

By Marc Heyns I’m very optimistic about the continuation of Moore’s Law. But in saying that, I’m speaking about Moore’s Law purely as an economic law. I believe we’ll be able to offer increasing amounts of functionality at lower and lower costs. And technological innovations as well as advances in design and application will be crucial in realizing this. But I don’t believe a ne... » read more

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