Conflicting Demands At The Edge

By Ed Sperling - 04 Jun, 2020 - Comments: 0

Semiconductor Engineering sat down to define what the edge will look like with Jeff DeAngelis, managing director of the Industrial and Healthcare Business Unit at Maxim Integrated; Norman Chang, chief technologist at Ansys; Andrew Grant, senior director of artificial intelligence at Imagination Technologies; Thomas Ensergueix, senior director of the automotive and IoT line of business at Arm; V... » read more

Choosing Between CCIX And CXL

By Ed Sperling - 19 May, 2020 - Comments: 0

Semiconductor Engineering sat down to the discuss the pros and cons of the Compute Express Link (CXL) and the Cache Coherent Interconnect for Accelerators (CCIX) with Kurt Shuler, vice president of marketing at Arteris IP; Richard Solomon, technical marketing manager for PCI Express controller IP at Synopsys; and Jitendra Mohan, CEO of Astera Labs. What follows are excerpts of that conversati... » read more

Which Chip Interconnect Protocol Is Better?

By Ed Sperling - 11 May, 2020 - Comments: 0

Addressing IC Security Threats Before And After They Emerge

By Ed Sperling - 29 Jan, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss different approaches to security with Warren Savage, research scientist in the Applied Research Laboratory for Intelligence and Security at the University of Maryland; Neeraj Paliwal, vice president and general manager of Rambus Security; Luis Ancajas, marketing director for IoT security software solutions at Micron; Doug Suerich, product evangelist... » read more

Determining What Really Needs To Be Secured In A Chip

By Ed Sperling - 20 Jan, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss what's needed to secure hardware and why many previous approaches have been unsuccessful, with Warren Savage, research scientist in the Applied Research Laboratory for Intelligence and Security at the University of Maryland; Neeraj Paliwal, vice president and general manager of Rambus Security; Luis Ancajas, marketing director for IoT security softw... » read more

Security Risks In The Supply Chain

By Ed Sperling - 09 Jan, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss security in the supply chain with Warren Savage, research scientist in the Applied Research Laboratory for Intelligence and Security at the University of Maryland; Neeraj Paliwal, vice president and general manager of Rambus Security; Luis Ancajas, marketing director for IoT security software solutions at Micron; Doug Suerich, product evangelist at ... » read more

Security Tradeoffs In A Shifting Global Supply Chain

By Ed Sperling - 30 Sep, 2019 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss a wide range of hardware security issues and possible solutions with Norman Chang, chief technologist for the Semiconductor Business Unit at ANSYS; Helena Handschuh, fellow at Rambus, and Mike Borza, principal security technologist at Synopsys. What follows are excerpts of that conversation. The first part of this discussion ca... » read more

Why Data Is So Difficult To Protect In AI Chips

By Ed Sperling - 25 Sep, 2019 - Comments: 0

The Race For Better Computational Software

By Ed Sperling - 05 Sep, 2019 - Comments: 0

Anirudh Devgan, president of Cadence, sat down with Semiconductor Engineering to talk about computational software, why it's so critical at the edge and in AI systems, and where the big changes are across the semiconductor industry. What follows are excerpts of that conversation. SE: There is no consistent approach to how data will be processed at the edge, in part because there is no consis... » read more

Challenges To Building Level 5 Automotive Chips

By Ann Mutschler - 05 Sep, 2019 - Comments: 0

It’s an exciting time in the automotive space, and this is especially true when it comes to all of the activity around autonomous driving and the path to achieving full Level 5 autonomy. The technology is complex, the ecosystem seems to get more complex by the day, and simulating autonomous systems safely makes this an extremely fascinating area from an engineering perspective. At the heart o... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

category: Round Tables

category: IoT, Security & Automotive