Could Liquid IP Lead To Better Chips? (Part 3)

By Brian Bailey - 09 Jan, 2018 - Comments: 0

Semiconductor Engineering sat down to discuss the benefits that could come from making IP available as abstract blocks instead of RTL implementations with Mark Johnstone, technical director for Electronic Design Automation for [getentity id="22499" e_name="NXP"] Semiconductor; [getperson id="11489" p_name="Drew Wingard"], CTO at [getentity id="22605" e_name="Sonics"]; Bryan Bowyer, director of ... » read more

Which Verification Engine?

By Ed Sperling - 02 Jan, 2018 - Comments: 0

Semiconductor Engineering sat down to discuss the state of verification with Jean-Marie Brunet, senior director of marketing for emulation at [getentity id="22017" e_name="Mentor, a Siemens Business"]; Frank Schirrmeister, senior group director for product management at [getentity id="22032" e_name="Cadence"]; Dave Kelf, vice president of marketing at [getentity id="22395" e_name="OneSpin Solut... » read more

Custom Vs. Non-Custom Design

By Ed Sperling - 21 Dec, 2017 - Comments: 1

Semiconductor Engineering sat down to discuss custom designs with Yong Pang, head of North American operations for [getentity id="22217" e_name="Imec"]; Phil Burr, director of portfolio product management for [getentity id="22186" e_name="Arm's"] embedded and automotive groups; Ambar Sarkar, chief technologist at eInfochips; and John Tinson, vice president of sales at Sondrel. What follows are ... » read more

Could Liquid IP Lead To Better Chips?

By Brian Bailey - 13 Dec, 2017 - Comments: 0

Which Verification Engine? (Part 2)

By Ed Sperling - 06 Dec, 2017 - Comments: 1

Could Liquid IP Lead To Better Chips?

By Brian Bailey - 30 Nov, 2017 - Comments: 0

Which Verification Engine?

By Ed Sperling - 01 Nov, 2017 - Comments: 1

Integrated Photonics (Part 3)

By Brian Bailey - 12 Sep, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss the status of integrated photonics with Twan Korthorst, CEO for PhoeniX Software; Gilles Lamant, distinguished engineer for [getentity id="22032" e_name="Cadence"]; Bill De Vries, director of marketing for Lumerical Solutions; and Brett Attaway, director of EPDA solutions at AIM Photonics, SUNY Polytechnic Institute. What follows are excerpts of tha... » read more

Integrated Photonics (Part 2)

By Brian Bailey - 06 Sep, 2017 - Comments: 1

Integrated Photonics (Part 1)

By Brian Bailey - 30 Aug, 2017 - Comments: 0

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Knowledge Centers
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Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

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Partitioning In The Chiplet Era

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3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

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AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

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by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

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Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

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Why Small Fab And Assembly Houses Are Thriving

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category: Round Tables

category: IoT, Security & Automotive

Could Liquid IP Lead To Better Chips? (Part 3)

Which Verification Engine?

Custom Vs. Non-Custom Design

Could Liquid IP Lead To Better Chips?

Which Verification Engine? (Part 2)

Could Liquid IP Lead To Better Chips?

Which Verification Engine?

Integrated Photonics (Part 3)

Integrated Photonics (Part 2)

Integrated Photonics (Part 1)