UltraSoC: Debug IP

By Ed Sperling - 03 Nov, 2015 - Comments: 0

The background noise across the engineering community is rising with the growing complexity of SoCs. While the big news several years ago was the introduction of chips with 1 billion transistors, that's no longer making headlines. There are now well over 1 billion transistors in advanced SoCs and more than 100 IP blocks. Even abstractions are beginning to break down (see related story). Ent... » read more

Plunify: FPGA Design Closure

By Ed Sperling - 09 Feb, 2015 - Comments: 0

The number of EDA startups has plummeted around the globe, and nowhere is this more evident than in Singapore. In fact, there is exactly one EDA startup in that country—[getentity id="22672" e_name="Plunify"]—and even that isn't so new. Plunify started life in 2009 as a cloud-based startup, whose mission was to provide public cloud compute services to companies developing FPGAs. While th... » read more

Silicon Catalyst: Semiconductor Incubator

By Ed Sperling - 26 Jan, 2015 - Comments: 0

Walk into any hall at CES this year and you're overwhelmed by the number of startups. Try doing the same at any semiconductor show, though, and the picture looks far different. Because of the startup capital required, and the amount of time it takes to see a return on investment, semiconductor entrepreneurs are having a much tougher time. Enter Silicon Catalyst, an incubator that was just st... » read more

Invionics: EDA Development Platform

By Brian Bailey - 04 Jan, 2015 - Comments: 0

There has been a dearth of EDA startups over the past year. In fact, if you check out the Knowledge Center for companies founded in 2014 you will find exactly one - [getentity id="22834" comment="Pollen Technology"], a metrology company. In 2013 there were four, one of which was [getentity id="22413" comment="Invionics"]. Now before we get excited about a new EDA startup—and yes, it is an EDA... » read more

Executive Insight: Lucio Lanza

By Ed Sperling - 30 Oct, 2014 - Comments: 2

Lucio Lanza, managing director of Lanza techVentures, a former Intel engineer, and the 2014 Phil Kaufman Award winner, sat down with Semiconductor Engineering to talk about the shrinking number of startups, future investments, new opportunities in EDA, Moore's Law and the Internet of Things. SE: You're one of the last VCs still actively investing in EDA. Why? Lanza: There are several indi... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.