Emerging NVM: Review Of Emerging Memory Materials And Device Architectures


A new technical paper titled "Emerging Nonvolatile Memory Technologies in the Future of Microelectronics" was published by researchers at Texas A&M University, University of Massachusetts and USC. Abstract "Memory technologies are central to modern computing systems, performing essential functions that range from primary data storage to advanced tasks, such as in-memory computing for ... » read more

LLM-Powered Automatic VLSI Design Flow Tuning Framework


A new technical paper titled "CROP: Circuit Retrieval and Optimization with Parameter Guidance using LLMs" was published by researchers at Duke University and Synopsys. Abstract "Modern very large-scale integration (VLSI) design requires the implementation of integrated circuits using electronic design automation (EDA) tools. Due to the complexity of EDA algorithms, the vast parameter space... » read more

Dielectrics for 2D TMDs, Including Deposition Strategies And Emerging Dielectric Materials (Cambridge)


A new technical paper titled "Gate dielectrics for transistors based on two-dimensional transition metal dichalcogenide semiconductors" was published by researchers at University of Cambridge. "This perspective analyses the state of the art on 2D TMD and dielectric interfaces, highlighting key challenges in depositing oxide dielectrics on top of atomically thin TMD semiconductors. We provide... » read more

NVIDIA GPU Confidential Computing: Threat Model And Security Insights (IBM Research, Ohio State)


A new technical paper titled "NVIDIA GPU Confidential Computing Demystified" was published by IBM Research and Ohio State University. Abstract "GPU Confidential Computing (GPU-CC) was introduced as part of the NVIDIA Hopper Architecture, extending the trust boundary beyond traditional CPU-based confidential computing. This innovation enables GPUs to securely process AI workloads, providing ... » read more

Functional Hardware Trojans Specifically Tailored Tor SFQ (Univ. of Rochester)


A new technical paper titled "Hardware trojans in superconducting electronic circuits" was published by researchers at University of Rochester. Abstract "Hardware Trojans that exploit the unique characteristics of superconducting electronic (SCE) circuits are explored in this paper. Two types of hardware Trojan circuits are proposed: a magnetically-coupled data transmission Trojan embedded ... » read more

System-Level Approach To Reducing HBM Cost for AI inference (RPI, IBM)


A new technical paper titled "Breaking the HBM Bit Cost Barrier: Domain-Specific ECC for AI Inference Infrastructure" was published by researchers at Rensselaer Polytechnic Institute and IBM. Abstract "High-Bandwidth Memory (HBM) delivers exceptional bandwidth and energy efficiency for AI workloads, but its high cost per bit, driven in part by stringent on-die reliability requirements, pose... » read more

Detailed Study of Performance Modeling For LLM Implementations At Scale (imec)


A new technical paper titled "System-performance and cost modeling of Large Language Model training and inference" was published by researchers at imec. Abstract "Large language models (LLMs), based on transformer architectures, have revolutionized numerous domains within artificial intelligence, science, and engineering due to their exceptional scalability and adaptability. However, the ex... » read more

Accelerator Architecture For In-Memory Computation of CNN Inferences Using Racetrack Memory


A new technical paper titled "Hardware-software co-exploration with racetrack memory based in-memory computing for CNN inference in embedded systems" was published by researchers at National University of Singapore, A*STAR, Chinese Academy of Sciences, and Hong Kong University of Science and Technology. Abstract "Deep neural networks generate and process large volumes of data, posing challe... » read more

Development and Deployment of 2.5D Multi-Foundry Chiplet Solution Scaling Beyond Multi-Reticle Approaches (Intel)


A new technical paper titled "System-Level Validation Across Multiple Platforms to build a Robust 2.5D Multi Foundry Chiplet Solution" was published by researchers at Intel Corporation. Abstract "The proliferation of chiplet-based designs, driven by the escalating computational demands of AI, presents unique validation challenges when integrating heterogenous chiplets. This paper investigat... » read more

Framework To Analyze Threats To The Semiconductor Supply Chain (NIST, U. of Maryland)


A new technical paper titled "Analyzing Collusion Threats in the Semiconductor Supply Chain" was published by researchers at NIST and University of Maryland. Abstract "This work proposes a framework for analyzing threats related to the semiconductor supply chain. The framework introduces a metric that quantifies the severity of different threats subjected to a collusion of adversaries from ... » read more

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