Issues and Opportunities in Using LLMs for Hardware Design


A technical paper titled "Chip-Chat: Challenges and Opportunities in Conversational Hardware Design" was published by researchers at NYU and University of New South Wales. Abstract "Modern hardware design starts with specifications provided in natural language. These are then translated by hardware engineers into appropriate Hardware Description Languages (HDLs) such as Verilog before syn... » read more

Optimizing Projected PCM for Analog Computing-In-Memory Inferencing (IBM)


A new technical paper titled "Optimization of Projected Phase Change Memory for Analog In-Memory Computing Inference" was published by researchers at IBM Research. "A systematic study of the electrical properties-including resistance values, memory window, resistance drift, read noise, and their impact on the accuracy of large neural networks of various types and with tens of millions of wei... » read more

Solving Memory Mapping Issues with Deep RL (Google)


A technical paper titled "Optimizing Memory Mapping Using Deep Reinforcement Learning" was published by Google DeepMind and Google. Abstract: "Resource scheduling and allocation is a critical component of many high impact systems ranging from congestion control to cloud computing. Finding more optimal solutions to these problems often has significant impact on resource and time savings, red... » read more

RL-Guided Detailed Routing Framework for Advanced Custom Circuits


A technical paper titled "Reinforcement Learning Guided Detailed Routing for Custom Circuits" was published by researchers at UT Austin, Princeton University, and NVIDIA. "This paper presents a novel detailed routing framework for custom circuits that leverages deep reinforcement learning to optimize routing patterns while considering custom routing constraints and industrial design rules. C... » read more

Cross-Shaped Reconfigurable Transistor (CS-RFET) With Flexible Signal Routing


A new technical paper titled "Cross-Shape Reconfigurable Field Effect Transistor for Flexible Signal Routing" was published by researchers at NaMLab gGmbH, École Centrale de Lyon, and TU Dresden. "A detailed comprehensive study of the cross-shape reconfigurable field effect transistor electrical characteristics are presented. The fabricated device demonstrates nearly equal transistor charac... » read more

Performance Of Analog In-Memory Computing On Imaging Problems


A technical paper titled "Accelerating AI Using Next-Generation Hardware: Possibilities and Challenges With Analog In-Memory Computing" was published by researchers at Lund University and Ericsson Research. Abstract "Future generations of computing systems need to continue increasing processing speed and energy efficiency in order to meet the growing workload requirements under stringent en... » read more

Circuit Layout-Level Hardware Trojan Detection


A new technical paper titled "A Needle in the Haystack: Inspecting Circuit Layout to Identify Hardware Trojans" was published by researchers at The University of Texas at Dallas and Qualcomm. Abstract "Distributed integrated circuit (IC) supply chain has resulted in a myriad of security vulnerabilities including that of hardware Trojan (HT). An HT can perform malicious modifications on an I... » read more

28nm-HKMG-Based FeFET Devices For Synaptic Applications


A technical paper titled "28 nm high-k-metal gate ferroelectric field effect transistors based synapses- A comprehensive overview" was published by researchers at Fraunhofer-Institut für Photonische Mikrosysteme IPMS, Indian Institute of Technology Madras, and GlobalFoundries. Abstract This invited article we present a comprehensive overview of 28 nm high-k-metal gate-based ferroelectric f... » read more

Recent Developments in Neuromorphic Computing, Focusing on Hardware Design and Reliability


A new technical paper titled "Special Session: Neuromorphic hardware design and reliability from traditional CMOS to emerging technologies" was published by researchers at Univ. Lyon, Ecole Centrale de Lyon, Univ. Grenoble Alpes, Hewlett Packard Labs, CEA-LETI, and Politecnico di Torino. Abstract "The field of neuromorphic computing has been rapidly evolving in recent years, with an incre... » read more

ML-Based Third-Party IP Trust Verification Framework (U. of Florida, U. of Kansas)


A technical paper titled "Hardware IP Assurance against Trojan Attacks with Machine Learning and Post-processing" was published by researchers at University of Florida and University of Kansas. Abstract: "System-on-chip (SoC) developers increasingly rely on pre-verified hardware intellectual property (IP) blocks often acquired from untrusted third-party vendors. These IPs might contain hidd... » read more

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