category: AI/ML/DL

category: IoT, Security & Automotive

Efficient TNN Inference on RISC-V Processing Cores With Minimal HW Overhead
By Technical Paper Link - 10 Jun, 2024 - Comments: 0

A new technical paper titled "xTern: Energy-Efficient Ternary Neural Network Inference on RISC-V-Based Edge Systems" was published by researchers at ETH Zurich and Universita di Bologna. Abstract "Ternary neural networks (TNNs) offer a superior accuracy-energy trade-off compared to binary neural networks. However, until now, they have required specialized accelerators to realize their effic... » read more

CAM-Based CMOS Implementation Of Reference Frames For Neuromorphic Processors (Carnegie Mellon U.)
By Technical Paper Link - 31 May, 2024 - Comments: 0

A technical paper titled “NeRTCAM: CAM-Based CMOS Implementation of Reference Frames for Neuromorphic Processors” was published by researchers at Carnegie Mellon University. Abstract: "Neuromorphic architectures mimicking biological neural networks have been proposed as a much more efficient alternative to conventional von Neumann architectures for the exploding compute demands of AI work... » read more

Scheduling Multi-Model AI Workloads On Heterogeneous MCM Accelerators (UC Irvine)
By Technical Paper Link - 24 May, 2024 - Comments: 0

A technical paper titled “SCAR: Scheduling Multi-Model AI Workloads on Heterogeneous Multi-Chiplet Module Accelerators” was published by researchers at University of California Irvine. Abstract: "Emerging multi-model workloads with heavy models like recent large language models significantly increased the compute and memory demands on hardware. To address such increasing demands, designin... » read more

Ferroelectric Memory-Based IMC for ML Workloads
By Technical Paper Link - 21 May, 2024 - Comments: 0

A new technical paper titled "Ferroelectric capacitors and field-effect transistors as in-memory computing elements for machine learning workloads" was published by researchers at Purdue University. Abstract "This study discusses the feasibility of Ferroelectric Capacitors (FeCaps) and Ferroelectric Field-Effect Transistors (FeFETs) as In-Memory Computing (IMC) elements to accelerate mach... » read more

New Ways To Optimize GEMM-Based Applications Targeting Two Leading AI-Optimized FPGA Architectures
By Technical Paper Link - 07 May, 2024 - Comments: 0

A technical paper titled “Efficient Approaches for GEMM Acceleration on Leading AI-Optimized FPGAs” was published by researchers at The University of Texas at Austin and Arizona State University. Abstract: "FPGAs are a promising platform for accelerating Deep Learning (DL) applications, due to their high performance, low power consumption, and reconfigurability. Recently, the leading FPGA... » read more

Framework For Early Anomaly Detection In AMS Components Of Automotive SoCs
By Technical Paper Link - 30 Apr, 2024 - Comments: 0

A technical paper titled “Enhancing Functional Safety in Automotive AMS Circuits through Unsupervised Machine Learning” was published by researchers at University of Texas at Dallas, Intel Corporation, NXP Semiconductors, and Texas Instruments. Abstract: "Given the widespread use of safety-critical applications in the automotive field, it is crucial to ensure the Functional Safety (FuSa) ... » read more

Memristor Crossbar Architecture for Encryption, Decryption and More
By Technical Paper Link - 16 Apr, 2024 - Comments: 0

A new technical paper titled "Tunable stochastic memristors for energy-efficient encryption and computing" was published by researchers at Seoul National University, Sandia National Laboratories, Texas A&M University and Applied Materials. Abstract "Information security and computing, two critical technological challenges for post-digital computation, pose opposing requirement... » read more

In-Memory Computing: Techniques for Error Detection and Correction
By Technical Paper Link - 16 Apr, 2024 - Comments: 0

A new technical paper titled "Error Detection and Correction Codes for Safe In-Memory Computations" was published by researchers at Robert Bosch, Forschungszentrum Julich, and Newcastle University. Abstract "In-Memory Computing (IMC) introduces a new paradigm of computation that offers high efficiency in terms of latency and power consumption for AI accelerators. However, the non-idealities... » read more

High-NA EUVL: Automated Defect Inspection Based on SEMI-SuperYOLO-NAS
By Technical Paper Link - 10 Apr, 2024 - Comments: 0

A new technical paper titled "Towards Improved Semiconductor Defect Inspection for high-NA EUVL based on SEMI-SuperYOLO-NAS" was published by researchers at KU Leuven, imec, Ghent University, and SCREEN SPE. Abstract "Due to potential pitch reduction, the semiconductor industry is adopting High-NA EUVL technology. However, its low depth of focus presents challenges for High Volume Manufac... » read more

Optimizing Event-Based Neural Network Processing For A Neuromorphic Architecture
By Technical Paper Link - 28 Mar, 2024 - Comments: 0

A new technical paper titled "Optimizing event-based neural networks on digital neuromorphic architecture: a comprehensive design space exploration" was published by imec, TU Delft and University of Twente. Abstract "Neuromorphic processors promise low-latency and energy-efficient processing by adopting novel brain-inspired design methodologies. Yet, current neuromorphic solutions still str... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy