category: AI/ML/DL

category: IoT, Security & Automotive

Dedicated 3D Accelerator Specifically Designed For Emerging Spiking Transformers
By Technical Paper Link - 13 Nov, 2024 - Comments: 0

A new technical paper titled "Spiking Transformer Hardware Accelerators in 3D Integration" was published by researchers at UC Santa Barbara, Georgia Tech and Burapha University. "Recognizing the current lack of dedicated hardware support for spiking transformers, this paper presents the first work on 3D spiking transformer hardware architecture and design methodology. We present an architect... » read more

Workload-Specific Data Movements Across AI Workloads in Multi-Chiplet AI Accelerators
By Technical Paper Link - 04 Nov, 2024 - Comments: 0

A new technical paper titled "Communication Characterization of AI Workloads for Large-scale Multi-chiplet Accelerators" was published by researchers at Universitat Politecnica de Catalunya. Abstract "Next-generation artificial intelligence (AI) workloads are posing challenges of scalability and robustness in terms of execution time due to their intrinsic evolving data-intensive characteris... » read more

Benchmark and Evaluation Framework For Characterizing LLM Performance In Formal Verification (UC Berkeley, Nvidia)
By Technical Paper Link - 04 Nov, 2024 - Comments: 0

A new technical paper titled "FVEval: Understanding Language Model Capabilities in Formal Verification of Digital Hardware" was published by researchers at UC Berkeley and NVIDIA. Abstract "The remarkable reasoning and code generation capabilities of large language models (LLMs) have spurred significant interest in applying LLMs to enable task automation in digital chip design. In particula... » read more

Current and Emerging Heterogeneous Integration Technologies For High-Performance Systems (Georgia Tech)
By Technical Paper Link - 23 Oct, 2024 - Comments: 0

A technical paper titled "Heterogeneous Integration Technologies for Artificial Intelligence Applications" was published by Georgia Tech. Abstract "The rapid advancement of artificial intelligence (AI) has been enabled by semiconductor-based electronics. However, the conventional methods of transistor scaling are not enough to meet the exponential demand for computing power driven by AI. ... » read more

Survey: HW SW Co-Design Approaches Tailored to LLMs
By Technical Paper Link - 11 Oct, 2024 - Comments: 0

A new technical paper titled "A Survey: Collaborative Hardware and Software Design in the Era of Large Language Models" was published by researchers at Duke University and Johns Hopkins University. Abstract "The rapid development of large language models (LLMs) has significantly transformed the field of artificial intelligence, demonstrating remarkable capabilities in natural language proce... » read more

TFETs: Design and Operation, Including Material Selection and Simulation Methods
By Technical Paper Link - 07 Oct, 2024 - Comments: 0

A new technical paper titled "Multiscale Simulation and Machine Learning Facilitated Design of Two-Dimensional Nanomaterials-Based Tunnel Field-Effect Transistors: A Review" was published by researchers at University of Chicago and Argonne National Lab. Abstract "Traditional transistors based on complementary metal-oxide-semiconductor (CMOS) and metal-oxide-semiconductor field-effect transi... » read more

Novel NorthPole Architecture Enables Low-Latency, High-Energy-Efficiency LLM inference (IBM Research)
By Technical Paper Link - 27 Sep, 2024 - Comments: 0

A new technical paper titled "Breakthrough low-latency, high-energy-efficiency LLM inference performance using NorthPole" was published by researchers at IBM Research. At the IEEE High Performance Extreme Computing (HPEC) Virtual Conference in September 2024, new performance results for their AIU NorthPole AI inference accelerator chip were presented on a 3-billion-parameter Granite LLM. ... » read more

Hardware Acceleration Approach for KAN Via Algorithm-Hardware Co-Design
By Technical Paper Link - 26 Sep, 2024 - Comments: 2

A new technical paper titled "Hardware Acceleration of Kolmogorov-Arnold Network (KAN) for Lightweight Edge Inference" was published by researchers at Georgia Tech, TSMC and National Tsing Hua University. Abstract "Recently, a novel model named Kolmogorov-Arnold Networks (KAN) has been proposed with the potential to achieve the functionality of traditional deep neural networks (DNNs) using ... » read more

Models for Both Strained and Unstrained GAA FETs Using Neural Networks
By Technical Paper Link - 23 Sep, 2024 - Comments: 0

A new technical paper titled "Impact of Strain on Sub-3 nm Gate-all-Around CMOS Logic Circuit Performance Using a Neural Compact Modeling Approach" was published by researchers at Hanyang University and Alsemy Inc. Abstract "Impact of strain of sub-3 nm gate-all-around (GAA) CMOS transistors on the circuit performance is evaluated using a neural compact model. The model was trained using 3D... » read more

Characteristics and Potential HW Architectures for Neuro-Symbolic AI
By Technical Paper Link - 23 Sep, 2024 - Comments: 0

A new technical paper titled "Towards Efficient Neuro-Symbolic AI: From Workload Characterization to Hardware Architecture" was published by researchers at Georgia Tech, UC Berkeley, and IBM Research. Abstract: "The remarkable advancements in artificial intelligence (AI), primarily driven by deep neural networks, are facing challenges surrounding unsustainable computational trajectories, li... » read more

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