Predicting Defect Properties In Semiconductors With Graph Neural Networks


A technical paper titled “Accelerating Defect Predictions in Semiconductors Using Graph Neural Networks” was published by researchers at Purdue University, Indian Institute of Technology (IIT) Madras, GE Research, and National Institute of Standards and Technology (NIST). Abstract: "Here, we develop a framework for the prediction and screening of native defects and functional impurities i... » read more

Energy Usage in Layers Of Computing (SLAC)


A technical paper titled “Energy Estimates Across Layers of Computing: From Devices to Large-Scale Applications in Machine Learning for Natural Language Processing, Scientific Computing, and Cryptocurrency Mining” was published by researchers at SLAC National Laboratory and Stanford University. Abstract: "Estimates of energy usage in layers of computing from devices to algorithms have bee... » read more

A Study Of LLMs On Multiple AI Accelerators And GPUs With A Performance Evaluation


A technical paper titled “A Comprehensive Performance Study of Large Language Models on Novel AI Accelerators” was published by researchers at Argonne National Laboratory, State University of New York, and University of Illinois. Abstract: "Artificial intelligence (AI) methods have become critical in scientific applications to help accelerate scientific discovery. Large language models (L... » read more

LLMs For Hardware Design Verification


A technical paper titled “LLM4DV: Using Large Language Models for Hardware Test Stimuli Generation” was published by researchers at University of Cambridge, lowRISC, and Imperial College London. Abstract: "Test stimuli generation has been a crucial but labor-intensive task in hardware design verification. In this paper, we revolutionize this process by harnessing the power of large langua... » read more

Embedded Automotive Platforms: Evaluating Power And Performance Of Image Classification And Objects Detection CNNs 


A technical paper titled “Performance/power assessment of CNN packages on embedded automotive platforms” was published by researchers at University of Modena and Reggio Emilia. Abstract: "The rise of power-efficient embedded computers based on highly-parallel accelerators opens a number of opportunities and challenges for researchers and engineers, and paved the way to the era of edge com... » read more

Applying Machine Learning to EDA, FPGA Design Automation Tools


A technical paper titled “Application of Machine Learning in FPGA EDA Tool Development” was published by researchers at the University of Texas Dallas. Abstract: "With the recent advances in hardware technologies like advanced CPUs and GPUs and the large availability of open-source libraries, machine learning has penetrated various domains, including Electronics Design Automation (EDA). E... » read more

LLM-Aided AI Accelerator Design Automation (Georgia Tech)


A technical paper titled “GPT4AIGChip: Towards Next-Generation AI Accelerator Design Automation via Large Language Models” was published by researchers at Georgia Institute of Technology. Abstract: "The remarkable capabilities and intricate nature of Artificial Intelligence (AI) have dramatically escalated the imperative for specialized AI accelerators. Nonetheless, designing these accele... » read more

LLM-Assisted Generation Of Formal Verification Testbenches: RTL to SVA (Princeton)


A technical paper titled “From RTL to SVA: LLM-assisted generation of Formal Verification Testbenches” was published by researchers at Princeton University. Abstract: "Formal property verification (FPV) has existed for decades and has been shown to be effective at finding intricate RTL bugs. However, formal properties, such as those written as System Verilog Assertions (SVA), are time-con... » read more

Neuromorphic Hardware Accelerator For Heterogeneous Many-Accelerator SoCs


A technical paper titled “SpikeHard: Efficiency-Driven Neuromorphic Hardware for Heterogeneous Systems-on-Chip” was published by researchers at Columbia University. Abstract: "Neuromorphic computing is an emerging field with the potential to offer performance and energy-efficiency gains over traditional machine learning approaches. Most neuromorphic hardware, however, has been designed wi... » read more

Improving ML-Based Device Modeling Using Variational Autoencoder Techniques


A technical paper titled “Improving Semiconductor Device Modeling for Electronic Design Automation by Machine Learning Techniques” was published by researchers at Commonwealth Scientific and Industrial Research Organisation (CSIRO), Peking University, National University of Singapore, and University of New South Wales. Abstract: "The semiconductors industry benefits greatly from the integ... » read more

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