category: Architectures

category: IoT, Security & Automotive

DRAM Cache for GPUs With SCM And High Bandwidth
By Technical Paper Link - 26 Mar, 2024 - Comments: 0

A new technical paper titled "Bandwidth-Effective DRAM Cache for GPUs with Storage-Class Memory" was published by researchers at POSTECH and Songsil University. Abstract "We propose overcoming the memory capacity limitation of GPUs with high-capacity Storage-Class Memory (SCM) and DRAM cache. By significantly increasing the memory capacity with SCM, the GPU can capture a larger fraction o... » read more

DRAM Chips Perform Functionally-Complete Boolean Operations (ETH Zurich)
By Technical Paper Link - 12 Mar, 2024 - Comments: 0

A new technical paper titled "Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis" was published by researchers at ETH Zurich. Abstract: "Processing-using-DRAM (PuD) is an emerging paradigm that leverages the analog operational properties of DRAM circuitry to enable massively parallel in-DRAM computation. PuD has the potential to significantly ... » read more

An All-Optical General-Purpose CPU And Optical Computer Architecture (Akhetonics)
By Technical Paper Link - 11 Mar, 2024 - Comments: 0

A technical paper titled “An All-Optical General-Purpose CPU and Optical Computer Architecture” was published by researchers at Akhetonics. Abstract: "Energy efficiency of electronic digital processors is primarily limited by the energy consumption of electronic communication and interconnects. The industry is almost unanimously pushing towards replacing both long-haul, as well as local c... » read more

Large-Scale Quantum-Processing Architecture Surpassing The Tier of 1000 Atomic Qubits (TU Darmstadt)
By Technical Paper Link - 05 Mar, 2024 - Comments: 0

A technical paper titled “Supercharged two-dimensional tweezer array with more than 1000 atomic qubits” was published by researchers at Technische Universität Darmstadt (TU Darmstadt). Abstract: "We report on the realization of a large-scale quantum-processing architecture surpassing the tier of 1000 atomic qubits. By tiling multiple microlens-generated tweezer arrays, each operated by a... » read more

A Precision-Optimized Fixed-Point Near-Memory Digital Processing Unit for Analog IMC (IBM and ETH Zurich)
By Technical Paper Link - 22 Feb, 2024 - Comments: 0

A technical paper titled “A Precision-Optimized Fixed-Point Near-Memory Digital Processing Unit for Analog In-Memory Computing” was published by researchers at IBM Research Europe and IIS-ETH Zurich. Abstract: "Analog In-Memory Computing (AIMC) is an emerging technology for fast and energy-efficient Deep Learning (DL) inference. However, a certain amount of digital post-processing is requ... » read more

White-Box Fuzzer With Static Analysis To Detect And Locate Timing Vulnerabilities In RISC-V Processors 
By Technical Paper Link - 20 Feb, 2024 - Comments: 0

A technical paper titled “WhisperFuzz: White-Box Fuzzing for Detecting and Locating Timing Vulnerabilities in Processors” was published by researchers at Indian Institute of Technology Madras, Texas A&M University, and Technische Universität Darmstadt. Abstract: "Timing vulnerabilities in processors have emerged as a potent threat. As processors are the foundation of any computing s... » read more

Ultra-Low Power CiM Design For Practical Edge Scenarios
By Technical Paper Link - 20 Feb, 2024 - Comments: 0

A technical paper titled “Low Power and Temperature-Resilient Compute-In-Memory Based on Subthreshold-FeFET” was published by researchers at Zhejiang University, University of Notre Dame, Technical University of Munich, Munich Institute of Robotics and Machine Intelligence, and the Laboratory of Collaborative Sensing and Autonomous Unmanned Systems of Zhejiang Province. Abstract: "Compute... » read more

FPGA-Based HW/SW Platform For Pre-Silicon Emulation Of RISC-V Designs (Barcelona Supercomputing Center)
By Technical Paper Link - 15 Feb, 2024 - Comments: 0

A technical paper titled “Makinote: An FPGA-Based HW/SW Platform for Pre-Silicon Emulation of RISC-V Designs” was published by researchers at Barcelona Supercomputing Center and Universitat Politècnica de Catalunya. Abstract: "Emulating chip functionality before silicon production is crucial, especially with the increasing prevalence of RISC-V-based designs. FPGAs are promising candidate... » read more

New Metasurface Architecture To Deliver Ultrafast Information Processing And Versatile Terahertz Sources
By Technical Paper Link - 15 Feb, 2024 - Comments: 0

A technical paper titled “Light-driven nanoscale vectorial currents” was published by researchers at Los Alamos National Laboratory, Menlo Systems, University of California Davis, Columbia University, Sandia National Laboratories, and Intellectual Ventures. Abstract: "Controlled charge flows are fundamental to many areas of science and technology, serving as carriers of energy and informa... » read more

SW/HW Codesign For CXL Memory Disaggregation In Billion-Scale Nearest Neighbor Search (KAIST)
By Technical Paper Link - 14 Feb, 2024 - Comments: 0

A technical paper titled “Bridging Software-Hardware for CXL Memory Disaggregation in Billion-Scale Nearest Neighbor Search” was published by researchers at the Korea Advanced Institute of Science and Technology (KAIST) and Panmnesia. Abstract: "We propose CXL-ANNS, a software-hardware collaborative approach to enable scalable approximate nearest neighbor search (ANNS) services. To this e... » read more

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