category: Architectures

category: IoT, Security & Automotive

Chiplet Hardware Security Module To Mitigate Security Vulnerabilities In SiP Systems (Univ. of Florida)
By Technical Paper Link - 09 Apr, 2024 - Comments: 0

A new technical paper titled "Advancing Trustworthiness in System-in-Package: A Novel Root-of-Trust Hardware Security Module for Heterogeneous Integration" was published by researchers at University of Florida (Gainesville). Abstract: "The semiconductor industry has adopted heterogeneous integration (HI), incorporating modular intellectual property (IP) blocks (chiplets) into a unified syst... » read more

Comparison Of The Meta Modeling Approach With HGLs
By Technical Paper Link - 09 Apr, 2024 - Comments: 0

A new technical paper titled "The Argument for Meta-Modeling-Based Approaches to Hardware Generation Languages" was published by researchers at Infineon Technologies and TU Munich. Abstract "The rapid evolution of Integrated Circuit (IC) development necessitates innovative methodologies such as code generation to manage complexity and increase productivity. Using the right methodology for g... » read more

3-Channel Package-Scale Galvanic Isolation Interface for SiC and GaN Power Switching Converters
By Technical Paper Link - 09 Apr, 2024 - Comments: 0

A new technical paper titled "A Three-Channel Package-Scale Galvanic Isolation Interface for Wide Bandgap Gate Drivers" was published by STMicroelectronics and DIEEI, Università di Catania. Abstract "This article presents the design of a three-channel package-scale galvanic isolation interface for SiC and GaN power switching converters. The isolation interface consists of two side-by-sid... » read more

Rowhammer Exploitation On AMD Platforms, DDR4 DDR5 (ETH Zurich)
By Technical Paper Link - 03 Apr, 2024 - Comments: 0

A new technical paper titled "ZenHammer: Rowhammer Attacks on AMD Zen-based Platforms" was published by researchers at ETH Zurich. The work will be presented at USENIX Security Symposium in August 2024. Abstract: "AMD has gained a significant market share in recent years with the introduction of the Zen microarchitecture. While there are many recent Rowhammer attacks launched from Intel CPU... » read more

Optimizing Event-Based Neural Network Processing For A Neuromorphic Architecture
By Technical Paper Link - 28 Mar, 2024 - Comments: 0

A new technical paper titled "Optimizing event-based neural networks on digital neuromorphic architecture: a comprehensive design space exploration" was published by imec, TU Delft and University of Twente. Abstract "Neuromorphic processors promise low-latency and energy-efficient processing by adopting novel brain-inspired design methodologies. Yet, current neuromorphic solutions still str... » read more

DRAM Cache for GPUs With SCM And High Bandwidth
By Technical Paper Link - 26 Mar, 2024 - Comments: 0

A new technical paper titled "Bandwidth-Effective DRAM Cache for GPUs with Storage-Class Memory" was published by researchers at POSTECH and Songsil University. Abstract "We propose overcoming the memory capacity limitation of GPUs with high-capacity Storage-Class Memory (SCM) and DRAM cache. By significantly increasing the memory capacity with SCM, the GPU can capture a larger fraction o... » read more

DRAM Chips Perform Functionally-Complete Boolean Operations (ETH Zurich)
By Technical Paper Link - 12 Mar, 2024 - Comments: 0

A new technical paper titled "Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis" was published by researchers at ETH Zurich. Abstract: "Processing-using-DRAM (PuD) is an emerging paradigm that leverages the analog operational properties of DRAM circuitry to enable massively parallel in-DRAM computation. PuD has the potential to significantly ... » read more

An All-Optical General-Purpose CPU And Optical Computer Architecture (Akhetonics)
By Technical Paper Link - 11 Mar, 2024 - Comments: 0

A technical paper titled “An All-Optical General-Purpose CPU and Optical Computer Architecture” was published by researchers at Akhetonics. Abstract: "Energy efficiency of electronic digital processors is primarily limited by the energy consumption of electronic communication and interconnects. The industry is almost unanimously pushing towards replacing both long-haul, as well as local c... » read more

Large-Scale Quantum-Processing Architecture Surpassing The Tier of 1000 Atomic Qubits (TU Darmstadt)
By Technical Paper Link - 05 Mar, 2024 - Comments: 0

A technical paper titled “Supercharged two-dimensional tweezer array with more than 1000 atomic qubits” was published by researchers at Technische Universität Darmstadt (TU Darmstadt). Abstract: "We report on the realization of a large-scale quantum-processing architecture surpassing the tier of 1000 atomic qubits. By tiling multiple microlens-generated tweezer arrays, each operated by a... » read more

A Precision-Optimized Fixed-Point Near-Memory Digital Processing Unit for Analog IMC (IBM and ETH Zurich)
By Technical Paper Link - 22 Feb, 2024 - Comments: 0

A technical paper titled “A Precision-Optimized Fixed-Point Near-Memory Digital Processing Unit for Analog In-Memory Computing” was published by researchers at IBM Research Europe and IIS-ETH Zurich. Abstract: "Analog In-Memory Computing (AIMC) is an emerging technology for fast and energy-efficient Deep Learning (DL) inference. However, a certain amount of digital post-processing is requ... » read more

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