category: Architectures

category: IoT, Security & Automotive

SW/HW Codesign For CXL Memory Disaggregation In Billion-Scale Nearest Neighbor Search (KAIST)
By Technical Paper Link - 14 Feb, 2024 - Comments: 0

A technical paper titled “Bridging Software-Hardware for CXL Memory Disaggregation in Billion-Scale Nearest Neighbor Search” was published by researchers at the Korea Advanced Institute of Science and Technology (KAIST) and Panmnesia. Abstract: "We propose CXL-ANNS, a software-hardware collaborative approach to enable scalable approximate nearest neighbor search (ANNS) services. To this e... » read more

Modeling And Analyzing Open-Source SoCs For Low-Power Cyber-Physical Systems
By Technical Paper Link - 08 Feb, 2024 - Comments: 0

A technical paper titled “TOP: Towards Open & Predictable Heterogeneous SoCs” was published by researchers at University of Bologna, ETH Zurich, and University of California San Diego. Abstract: "Ensuring predictability in modern real-time Systems-on-Chip (SoCs) is an increasingly critical concern for many application domains such as automotive, robotics, and industrial automation. An... » read more

Evaluation of Cache Replacement Policies Using Various Typical Simulation Approaches
By Technical Paper Link - 06 Feb, 2024 - Comments: 0

A technical paper titled “Improving the Representativeness of Simulation Intervals for the Cache Memory System” was published by researchers at Complutense University of Madrid, imec, and KU Leuven. Abstract: "Accurate simulation techniques are indispensable to efficiently propose new memory or architectural organizations. As implementing new hardware concepts in real systems is often not... » read more

Generating And Evaluating HW Verification Assertions From Design Specifications Via Multi-LLMs
By Technical Paper Link - 06 Feb, 2024 - Comments: 0

A technical paper titled “AssertLLM: Generating and Evaluating Hardware Verification Assertions from Design Specifications via Multi-LLMs” was published by researchers at Hong Kong University of Science and Technology. Abstract: "Assertion-based verification (ABV) is a critical method for ensuring design circuits comply with their architectural specifications, which are typically describe... » read more

LLM Inference on GPUs (Intel)
By Technical Paper Link - 02 Feb, 2024 - Comments: 0

A technical paper titled “Efficient LLM inference solution on Intel GPU” was published by researchers at Intel Corporation. Abstract: "Transformer based Large Language Models (LLMs) have been widely used in many fields, and the efficiency of LLM inference becomes hot topic in real applications. However, LLMs are usually complicatedly designed in model structure with massive operations and... » read more

Analysis Of Accel-Sim GPGPU Simulator And Model Improvements
By Technical Paper Link - 30 Jan, 2024 - Comments: 0

A technical paper titled “Analyzing and Improving Hardware Modeling of Accel-Sim” was published by researchers at Universitat Politècnica de Catalunya. Abstract: "GPU architectures have become popular for executing general-purpose programs. Their many-core architecture supports a large number of threads that run concurrently to hide the latency among dependent instructions. In modern GPU... » read more

RISC-V Ultra-Low-Power Edge Accelerators (EPFL)
By Technical Paper Link - 30 Jan, 2024 - Comments: 0

A technical paper titled “X-HEEP: An Open-Source, Configurable and Extendible RISC-V Microcontroller for the Exploration of Ultra-Low-Power Edge Accelerators” was published by researchers at EPFL. Abstract: "The field of edge computing has witnessed remarkable growth owing to the increasing demand for real-time processing of data in applications. However, challenges persist due to limitat... » read more

CiM Integration For ML Inference Acceleration
By Technical Paper Link - 16 Jan, 2024 - Comments: 0

A technical paper titled “WWW: What, When, Where to Compute-in-Memory” was published by researchers at Purdue University. Abstract: "Compute-in-memory (CiM) has emerged as a compelling solution to alleviate high data movement costs in von Neumann machines. CiM can perform massively parallel general matrix multiplication (GEMM) operations in memory, the dominant computation in Machine Lear... » read more

Novel Neuromorphic Artificial Neural Network Circuit Architecture
By Technical Paper Link - 15 Jan, 2024 - Comments: 0

A technical paper titled “Mosaic: in-memory computing and routing for small-world spike-based neuromorphic systems” was published by researchers at CEA-LETI Université Grenoble Alpes, University of Zurich and ETH Zurich. Abstract: "The brain’s connectivity is locally dense and globally sparse, forming a small-world graph—a principle prevalent in the evolution of various species, sugg... » read more

Ferroelectric Tunnel Junctions In Crossbar Array Analog In-Memory Compute Accelerators
By Technical Paper Link - 11 Jan, 2024 - Comments: 0

A technical paper titled “Ferroelectric Tunnel Junction Memristors for In-Memory Computing Accelerators” was published by researchers at Lund University. Abstract: "Neuromorphic computing has seen great interest as leaps in artificial intelligence (AI) applications have exposed limitations due to heavy memory access, with the von Neumann computing architecture. The parallel in-memory comp... » read more

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