Nanoscale Reconfigurable Si Transistors (TU Wien, CNRS, UNC)


A new technical paper titled "Nanoscale Reconfigurable Si Transistors: From Wires to Sheets and Unto Multi-Wire Channels" was published by researchers at TU Wien, CNRS, and University of North Carolina at Chapel Hill. Abstract: "In this work, bottom-up Al–Si–Al nanowire (NW) heterostructures are presented, which act as a prototype vehicle toward top-down fabricated nanosheet (NS) and ... » read more

A Framework For Improving Current Defect Inspection Techniques For Advanced Nodes


A technical paper titled “Improved Defect Detection and Classification Method for Advanced IC Nodes by Using Slicing Aided Hyper Inference with Refinement Strategy” was published by researchers at Ghent University, imec, and SCREEN SPE. Abstract: "In semiconductor manufacturing, lithography has often been the manufacturing step defining the smallest possible pattern dimensions. In recent ... » read more

A Polymer-Free Technique For Assembling Van Der Waals Heterostructures Using Flexible Si Nitride Membranes


A technical paper titled “Clean assembly of van der Waals heterostructures using silicon nitride membranes” was published by researchers at University of Manchester, Imperial College London, National Institute for Materials Science (Japan), and University of Lancaster. Abstract Van der Waals heterostructures are fabricated by layer-by-layer assembly of individual two-dimensional mater... » read more

How Different Metal Depositions Affect The Structure And Charge Transport Of 9-A Graphene Nanoribbons


A technical paper titled “Contact engineering for graphene nanoribbon devices” was published by researchers at University of Arizona, Swiss Federal Labs for Materials Science and Technology, University of California Berkeley, Stanford University, SRM Institute of Science and Technology, Texas A&M University, Lawrence Berkeley National Laboratory (LBNL), Max Planck Institute for Polymer... » read more

Diamond Semiconductor: Highest Breakdown Voltage, Lowest Leakage Current


A technical paper titled "Diamond p-Type Lateral Schottky Barrier Diodes With High Breakdown Voltage (4612 V at 0.01 mA/Mm)" was published by researchers at University of Illinois at Urbana–Champaign. Abstract "Diamond p-type lateral Schottky barrier diodes (SBDs) with a 2- μm -thick drift layer are fabricated with and without Al2O3 field plates. Schottky contacts composed of Mo (50 nm) ... » read more

Engineering chirality at wafer scale with ordered CNT architecture (Rice University and others)


A new technical paper titled "Engineering chirality at wafer scale with ordered carbon nanotube architectures" was published by researchers at Rice University, University of Utah, J.A. Woollam Co. and Tokyo Metropolitan University. Abstract "Creating artificial matter with controllable chirality in a simple and scalable manner brings new opportunities to diverse areas. Here we show two su... » read more

Lateral 3 kV AlN SBDs on Bulk AlN Substrates By MOCVD


A new technical paper titled "3 kV AlN Schottky Barrier Diodes on Bulk AlN Substrates by MOCVD" was published by researchers at Arizona State University. Abstract "This letter reports the first demonstration of AlN Schottky diodes on bulk AlN substrates by metalorganic chemical vapor phase deposition (MOCVD) with breakdown voltages exceeding 3 kV. The devices exhibited good rectifying char... » read more

New Polymer-Based Semiconductor: Harnessing The Power of Chirality


A technical paper titled “Subtle Molecular Changes Largely Modulate Chiral Helical Assemblies of Achiral Conjugated Polymers by Tuning Solution-State Aggregation” was published by researchers at University of Illinois Urbana-Champaign and Purdue University. Abstract: "Understanding the solution-state aggregate structure and the consequent hierarchical assembly of conjugated polymers is cr... » read more

Hybrid Photoresist Capable Of High-Resolution, Positive-Tone EUVL Patterning


A technical paper titled “Vapor-Phase Infiltrated Organic–Inorganic Positive-Tone Hybrid Photoresist for Extreme UV Lithography” was published by researchers at Stony Brook University, Brookhaven National Laboratory, and University of Texas at Dallas. Abstract: "Continuing extreme downscaling of semiconductor devices, essential for high performance and energy efficiency of future microe... » read more

Modulated Electron Microscopy Applied In The Process Monitoring Of Memory Cell And The Defect Inspection Of Floating Circuits


A technical paper titled “In situ electrical property quantification of memory devices by modulated electron microscopy” was published by researchers at Hitachi High-Tech Corporation, KIOXIA Corporation, and Western Digital. Abstract: "E-beam inspection based on voltage-contrast (VC) defect metrology has been widely utilized for failure mode analysis of memory devices. Variation in e-beam... » read more

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