Monolithic 3D TFT Integration at Room Temperature, Used to Stack 10 Vertical Layers


A new technical paper titled "Three-dimensional integrated metal-oxide transistors" was published by researchers at KAUST (King Abdullah University of Science and Technology). Abstract "The monolithic three-dimensional vertical integration of thin-film transistor (TFT) technologies could be used to create high-density, energy-efficient and low-cost integrated circuits. However, the develo... » read more

Programmable Quantum Emitter Formation In Si (Lawrence Berkeley National Lab., UC Berkeley)


A technical paper titled “Programmable quantum emitter formation in silicon” was published by researchers at Lawrence Berkeley National Laboratory and University of California Berkeley. Abstract: "Silicon-based quantum emitters are candidates for large-scale qubit integration due to their single-photon emission properties and potential for spin-photon interfaces with long spin coherence t... » read more

Finely Tuning The Electronic Band Structure of WSe2 With AFM


A technical paper titled “Strain Driven Electrical Bandgap Tuning of Atomically Thin WSe2” was published by researchers at University of Toronto, University of Tokyo,  and Stanford University. Abstract: "Tuning electrical properties of 2D materials through mechanical strain has predominantly focused on n-type 2D materials like MoS2 and WS2, while p-type 2D materials such as WSe2 remain... » read more

2D UltraLow Temperatures, High Performance Quantum


A new technical paper titled "Electrically tunable giant Nernst effect in two-dimensional van der Waals heterostructures" was published by researchers at EPFL and National Institute for Materials Science (Japan). Abstract "The Nernst effect, a transverse thermoelectric phenomenon, has attracted significant attention for its potential in energy conversion, thermoelectrics and spintronics. ... » read more

Nanosized Blocks Self-Assemble In Water To Create Tiny Floating Checkerboards (UC San Diego, Duke)


A technical paper titled “Self-assembly of nanocrystal checkerboard patterns via non-specific interactions” was published by researchers at the University of California San Diego and Duke University. Abstract: "Checkerboard lattices—where the resulting structure is open, porous, and highly symmetric—are difficult to create by self-assembly. Synthetic systems that adopt such structures... » read more

Power Electronic Packaging for Discrete Dies


A technical paper titled “Substrate Embedded Power Electronics Packaging for Silicon Carbide MOSFETs” was published by researchers at University of Cambridge, University of Warwick, Chongqing University, and SpaceX. Abstract: "This paper proposes a new power electronic packaging for discrete dies, namely Standard Cell which consists of a step-etched active metal brazed (AMB) substrate and... » read more

Interconnects: Criteria For Alternative Metal Benchmarking And Selection (Imec, KU Leuven)


A technical paper titled “Selecting Alternative Metals for Advanced Interconnects” was published by researchers at imec and KU Leuven. Abstract “Today, interconnect resistance and reliability are key limiters for the performance of advanced CMOS circuits. As transistor scaling is slowing, interconnect scaling has become the main driver for circuit miniaturization, and interconnect lim... » read more

Plasma Etching : Challenges And Options Going Forward (UMD, IBM, Lam Research, Intel, Samsung et al.)


A new technical paper titled "Future of plasma etching for microelectronics: Challenges and opportunities" was published by researchers from numerous academic institutions and companies, including University of Maryland, IBM, Arkema, UCLA, Lam Research, Intel Corporation, Samsung, Air Liquide, Sony, and many others. Abstract: "Plasma etching is an essential semiconductor manufacturing techn... » read more

Device Characteristics of GAA-Structured CMOS and CTFET Under Varying Temperatures


A new technical paper titled "Vertical-Stack Nanowire Structure of MOS Inverter and TFET Inverter in Low-temperature Application" was published by researchers at National Tsing Hua University and National United University in Taiwan. Abstract "Tunneling field effect transistors (TFET) have emerged as promising candidates for integrated circuits beyond conventional metal oxide semiconductor ... » read more

Comparing Thermal Properties In Molybdenum Substrate To Si And Glass For A System-On-Foil Integration (RIT, Lux)


A technical paper titled “Comparative Analysis of Thermal Properties in Molybdenum Substrate to Silicon and Glass for a System-on-Foil Integration” was published by researchers at Rochester Institute of Technology and Lux Semiconductors. Abstract: "Advanced electronics technology is moving towards smaller footprints and higher computational power. In order to achieve this, advanced packag... » read more

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