Chiplet Heterogeneity And Advanced Scheduling With Pipelining


A technical paper titled “Inter-Layer Scheduling Space Exploration for Multi-model Inference on Heterogeneous Chiplets” was published by researchers at University of California Irvine. Abstract: "To address increasing compute demand from recent multi-model workloads with heavy models like large language models, we propose to deploy heterogeneous chiplet-based multi-chip module (MCM)-based... » read more

Challenges And Innovations Of HW Security And Trust For Chiplet-Based 2.5D and 3D ICs


A technical paper titled “On hardware security and trust for chiplet-based 2.5D and 3D ICs: Challenges and Innovations” was published by researchers at STMicroelectronics Crolles (ST-CROLLES), Département Systèmes et Circuits Intégrés Numériques (DSCIN), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), and Laboratoire Systèm... » read more

Design Space Simulator Of Distributed Multi-Chiplet Manycore Architectures For Comm-Intensive Applications


A technical paper titled “Muchisim: A Simulation Framework for Design Exploration of Multi-Chip Manycore Systems” was published by researchers at Princeton University. Abstract: "Current design-space exploration tools cannot accurately evaluate communication-intensive applications whose execution is data-dependent (e.g., graph analytics and sparse linear algebra) on scale-out manycore sys... » read more

Environmentally Sustainable FPGAs (Notre Dame, Univ. of Pittsburgh)


A new technical paper titled "REFRESH FPGAs: Sustainable FPGA Chiplet Architectures" was published by University of Notre Dame and University of Pittsburgh. Abstract "There is a growing call for greater amounts of increasingly agile computational power for edge and cloud infrastructure to serve the computationally complex needs of ubiquitous computing devices. Thus, an important challenge i... » read more

Chiplet Architecture: Scalable and Cost-Efficient Systems for Irregular Applications (Princeton)


A new technical paper titled "DCRA: A Distributed Chiplet-based Reconfigurable Architecture for Irregular Applications" was published by researchers at Princeton University. Abstract "In recent years, the growing demand to process large graphs and sparse datasets has led to increased research efforts to develop hardware- and software-based architectural solutions to accelerate them. While... » read more

Chiplets For Generative AI Workloads: Challenges in both HW and SW


A new technical paper titled "Challenges and Opportunities to Enable Large-Scale Computing via Heterogeneous Chiplets" was published by researchers at University of Pittsburgh, Lightelligence, and Meta. Abstract "Fast-evolving artificial intelligence (AI) algorithms such as large language models have been driving the ever-increasing computing demands in today's data centers. Heterogeneous c... » read more

A Fast And Unified Toolchain For Rapid Design Space Exploration Of Chiplet Architectures


A technical paper titled “RapidChiplet: A Toolchain for Rapid Design Space Exploration of Chiplet Architectures” was published by researchers at ETH Zurich and University of Bologna. Abstract: "Chiplet architectures are a promising paradigm to overcome the scaling challenges of monolithic chips. Chiplets offer heterogeneity, modularity, and cost-effectiveness. The design space of chiplet ... » read more

Analyzing The U.S. Advanced Packaging Ecosystem With Countermeasures To Mitigate HW Security Issues


A technical paper titled “US Microelectronics Packaging Ecosystem: Challenges and Opportunities” was published by researchers at University of Florida, University of Miami, and Skywater Technology Foundry. Abstract: "The semiconductor industry is experiencing a significant shift from traditional methods of shrinking devices and reducing costs. Chip designers actively seek new technologica... » read more

Leveraging In-Package Wireless Technology To Improve The Thermal Behavior Of 2.5D Chiplet-Based SoP


A technical paper titled “REMOTE: Re-thinking Task Mapping on Wireless 2.5D Systems-on-Package for Hotspot Removal” was published by researchers at Swiss Federal Institute of Technology Lausanne (EPFL) and University of Applied Sciences and Arts of Western Switzerland (HES-SO). Abstract Excerpt "In this work, we propose a new task mapping heuristic that leverages in-package wireless t... » read more

A Chiplet-Based Fully Homomorphic Encryption Accelerator


A technical paper titled “CiFHER: A Chiplet-Based FHE Accelerator with a Resizable Structure” was published by researchers at Seoul National University. Abstract: "Fully homomorphic encryption (FHE) is in the spotlight as a definitive solution for privacy, but the high computational overhead of FHE poses a challenge to its practical adoption. Although prior studies have attempted to desig... » read more

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