category: Power & Performance

category: IoT, Security & Automotive

LLMs In The High-Level Synthesis Design Flow
By Technical Paper Link - 27 Aug, 2024 - Comments: 0

A new technical paper titled "Are LLMs Any Good for High-Level Synthesis?" was published by researchers at University of Arizona. Abstract "The increasing complexity and demand for faster, energy-efficient hardware designs necessitate innovative High-Level Synthesis (HLS) methodologies. This paper explores the potential of Large Language Models (LLMs) to streamline or replace the HLS proces... » read more

Characterizing Three Supercomputers: Multi-GPU Interconnect Performance
By Technical Paper Link - 27 Aug, 2024 - Comments: 0

A new technical paper titled "Exploring GPU-to-GPU Communication: Insights into Supercomputer Interconnects" was published by researchers at Sapienza University of Rome, University of Trento, Vrije Universiteit Amsterdam, ETH Zurich, CINECA, University of Antwerp, IBM Research Europe, HPE Cray, and NVIDIA. Abstract "Multi-GPU nodes are increasingly common in the rapidly evolving landscape... » read more

5 Novel Layout Design Methodologies For The 3nm Nanosheet FET Library (Samsung, KNU)
By Technical Paper Link - 13 Aug, 2024 - Comments: 0

A new technical paper titled "Design Technology Co-Optimization and Time-Efficient Verification for Enhanced Pin Accessibility in the Post-3-nm Node" was published by researchers at Samsung Electronics and Kyungpook National University (KNU). Abstract: "As the technology nodes approach 3 nm and beyond, nanosheet FETs (NSFETs) are replacing FinFETs. However, despite the migration of devices ... » read more

Potential Of 2D Semi-Metallic PtSe2 As Source/Drain Contacts For 2D Material FETs
By Technical Paper Link - 13 Aug, 2024 - Comments: 0

A technical paper titled “Improvement of Contact Resistance and 3D Integration of 2D Material Field-Effect Transistors Using Semi-Metallic PtSe2 Contacts” was published by researchers at Yonsei University, Korea Advanced Institute of Science and Technology (KAIST), Lincoln University College, Korea Institute of Science and Technology (KIST), and Ewha Womans University. Abstract: "In this ... » read more

Freeing Up Near-Memory Capacity For Cache Using Compression Techniques In A Flat Hybrid-Memory Architecture
By Technical Paper Link - 13 Aug, 2024 - Comments: 0

A technical paper titled “HMComp: Extending Near-Memory Capacity using Compression in Hybrid Memory” was published by researchers at Chalmers University of Technology and ZeroPoint Technologies. Abstract: "Hybrid memories, especially combining a first-tier near memory using High-Bandwidth Memory (HBM) and a second-tier far memory using DRAM, can realize a large and low cost, high-bandwi... » read more

Electrochemical RAM Cross-Point Arrays For An Analog DL Accelerator
By Technical Paper Link - 13 Aug, 2024 - Comments: 0

A technical paper titled “Retention-aware zero-shifting technique for Tiki-Taka algorithm-based analog deep learning accelerator” was published by researchers at Pohang University of Science and Technology, Korea University, and Kyungpook National University. "We present the fabrication of 4 K-scale electrochemical random-access memory (ECRAM) cross-point arrays for analog neural network... » read more

Data Filtering Directly Within A NAND Flash Memory Chip
By Technical Paper Link - 13 Aug, 2024 - Comments: 0

A technical paper titled “Search-in-Memory (SiM): Reliable, Versatile, and Efficient Data Matching in SSD's NAND Flash Memory Chip for Data Indexing Acceleration” was published by researchers at TU Dortmund, Academia Sinica, and National Taiwan University. "This paper introduces the Search-in-Memory (SiM) chip, which demonstrates the feasibility of performing data filtering directly with... » read more

Heterogeneity Of 3DICs As A Security Vulnerability
By Technical Paper Link - 01 Aug, 2024 - Comments: 0

A new technical paper titled "Harnessing Heterogeneity for Targeted Attacks on 3-D ICs" was published by Drexel University. Abstract "As 3-D integrated circuits (ICs) increasingly pervade the microelectronics industry, the integration of heterogeneous components presents a unique challenge from a security perspective. To this end, an attack on a victim die of a multi-tiered heterogeneous 3-... » read more

A Hybrid ECO Detailed Placement Flow for Mitigating Dynamic IR Drop (UC San Diego)
By Technical Paper Link - 01 Aug, 2024 - Comments: 0

A new technical paper titled "A Hybrid ECO Detailed Placement Flow for Improved Reduction of Dynamic IR Drop" was published by researchers at UC San Diego. Abstract: "With advanced semiconductor technology progressing well into sub-7nm scale, voltage drop has become an increasingly challenging issue. As a result, there has been extensive research focused on predicting and mitigating dynam... » read more

Survey of Energy Efficient PIM Processors
By Technical Paper Link - 01 Aug, 2024 - Comments: 0

A new technical paper titled "Survey of Deep Learning Accelerators for Edge and Emerging Computing" was published by researchers at University of Dayton and the Air Force Research Laboratory. Abstract "The unprecedented progress in artificial intelligence (AI), particularly in deep learning algorithms with ubiquitous internet connected smart devices, has created a high demand for AI compu... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy