Critical Design Considerations For High-Bandwidth Chiplet Interconnects (TSMC)


A new technical paper titled "High-Bandwidth Chiplet Interconnects for Advanced Packaging Technologies in AI/ML Applications: Challenges and Solutions" was published by researchers at TSMC. Abstract: "The demand for chiplet integration using 2.5D and 3D advanced packaging technologies has surged, driven by the exponential growth in computing performance required by Artificial Intelligence a... » read more

Pooling CPU Memory for LLM Inference With Lower Latency and Higher Throughput (UC Berkeley)


A new technical paper titled "Pie: Pooling CPU Memory for LLM Inference" was published by researchers at UC Berkeley. Abstract "The rapid growth of LLMs has revolutionized natural language processing and AI analysis, but their increasing size and memory demands present significant challenges. A common solution is to spill over to CPU memory; however, traditional GPU-CPU memory swapping ofte... » read more

Backpropagation Algorithm On Neuromorphic Spiking HW (U. Of Zurich, ETH Zurich, LANL)


A new technical paper titled "The backpropagation algorithm implemented on spiking neuromorphic hardware" was published by University of Zurich, ETH Zurich, Los Alamos National Laboratory, Royal Institution, London, et al. "This study presents a neuromorphic, spiking backpropagation algorithm based on synfire-gated dynamical information coordination and processing implemented on Intel’s Lo... » read more

Direct-To-Chip Liquid-Cooled Data Centers (Binghamton, Nvidia)


A new technical paper titled "Parameters of performance: A deep dive into liquid-to-air CDU assessment" was published by researchers at Binghamton University-SUNY and NVIDIA. Abstract: "The rapid growth in data center workloads and the increasing complexity of modern applications have led to significant contradictions between computational performance and thermal management. Traditional air... » read more

Schottky Barrier Transistors Roadmap (Univ. of Surrey, NaMLab, PGI et al.)


A new technical paper titled "Roadmap for Schottky Barrier Transistors" was published by researchers at University of Surrey, NaMLab gGmbH, Forschungszentrum Jülic, Peter Grünberg Institute, et al. Abstract: "In this roadmap we consider the status and challenges of technologies that use the properties of a rectifying metal-semiconductor interface, known as a Schottky barrier, as an asset ... » read more

Ge-Based Multigate SBFETs Operated In An NDR Mode (TU Wien, JKU)


A new technical paper titled "Implementation of Negative Differential Resistance-Based Circuits in Multigate Ge Transistors" was published by researchers at TU Wien and JKU (Johannes Kepler University). Abstract: "The co-integration of negative differential resistance (NDR) and Si-based CMOS technology might be a promising concept for multimode devices and circuits with enhanced performance... » read more

Sustainable Hardware Specialization Through Reconfigurable Logic (NUS, Ghent Univ.)


A  new technical paper titled "Sustainable Hardware Specialization" was published by researchers at National University of Singapore and Ghent University. "We explore sustainable hardware specialization through reconfigurable logic that has the potential to drastically reduce the environmental footprint compared to a sea of accelerators by amortizing its embodied footprint across multiple a... » read more

Distributed Shared Memory That Enlarges Effective Memory Capacity Through Intelligent Tiered DRAM and Storage Management (IIT)


A new technical paper titled "MegaMmap: Blurring the Boundary Between Memory and Storage for Data-Intensive Workloads" was published by researchers at Illinois Institute of Technology. "In this work, we propose MegaMmap: a software distributed shared memory (DSM) that enlarges effective memory capacity through intelligent tiered DRAM and storage management. MegaMmap provides workload-aware d... » read more

Dedicated 3D Accelerator Specifically Designed For Emerging Spiking Transformers


A new technical paper titled "Spiking Transformer Hardware Accelerators in 3D Integration" was published by researchers at UC Santa Barbara, Georgia Tech and Burapha University. "Recognizing the current lack of dedicated hardware support for spiking transformers, this paper presents the first work on 3D spiking transformer hardware architecture and design methodology. We present an architect... » read more

Improving Power and Speed in GAA-NS FETs


A new technical paper titled "Design Decoupling of Inner-and Outer-Gate Lengths in Nanosheet FETs for Ultimate Scaling" was published by researchers at Belgium Research Center, Huawei Technologies and Global TCAD Solutions. Abstract: "Using a full design-technology-co-optimization (DTCO) methodology, we show the advantages of design decoupling of inner -and outer-gates in gate-all-around ... » read more

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