Programmable HW Accelerators For BGV Fully Homomorphic Encryption In The Cloud


A technical paper titled “BASALISC: Programmable Hardware Accelerator for BGV Fully Homomorphic Encryption” was published by researchers at COSIC KU Leuven, Galois Inc., and Niobium Microsystems. Abstract: "Fully Homomorphic Encryption (FHE) allows for secure computation on encrypted data. Unfortunately, huge memory size, computational cost and bandwidth requirements limit its practic... » read more

Heat-Tolerant CNT-Based PUFs


A technical paper titled “CNT-PUFs: Highly Robust and Heat-Tolerant Carbon-Nanotube-Based Physical Unclonable Functions for Stable Key Generation” was published by researchers at Chemnitz University of Technology, University of Passau, Technical University of Darmstadt, and Fraunhofer Institute for Electronic Nano Systems (ENAS). Abstract: "In this work, we explore a highly robust and... » read more

NoC Obfuscation For Protecting Against Reverse Engineering Attacks (U. Of Florida)


A technical paper titled "ObNoCs: Protecting Network-on-Chip Fabrics Against Reverse-Engineering Attacks" was published by researchers at University of Florida. Abstract: "Modern System-on-Chip designs typically use Network-on-Chip (NoC) fabrics to implement coordination among integrated hardware blocks. An important class of security vulnerabilities involves a rogue foundry reverse-engineeri... » read more

A Hardware Accelerator Designed For The Homomorphic SEAL-Embedded Library


A technical paper titled "VLSI Design and FPGA Implementation of an NTT Hardware Accelerator for Homomorphic SEAL-Embedded Library" was published by researchers at University of Pisa. Abstract: "Homomorphic Encryption (HE) allows performing specific algebraic computations on encrypted data without the need for decryption. For this reason, HE is emerging as a strong privacy-preserving solution... » read more

RowPress: Read-Disturb Phenomenon In DDR4 DRAM Chips


A technical paper titled "RowPress: Amplifying Read Disturbance in Modern DRAM Chips" was published by researchers at ETH Zürich. Abstract: "Memory isolation is critical for system reliability, security, and safety. Unfortunately, read disturbance can break memory isolation in modern DRAM chips. For example, RowHammer is a well-studied read-disturb phenomenon where repeatedly opening and clo... » read more

Hardware-Efficient Approach To Defend Against Fault Attacks


A technical paper titled "Fault Attacks on Access Control in Processors: Threat, Formal Analysis and Microarchitectural Mitigation" was published by researchers at University of Kaiserslautern-Landau. Abstract: "Process isolation is a key component of the security architecture in any hardware/software system. However, even when implemented correctly and comprehensively at the software (SW) le... » read more

How Voltage-Controlled MRAM Devices Can Be Used To Create Unique Fingerprints Of Microelectronic Chips


A technical paper titled "Reconfigurable Physically Unclonable Functions Based on Nanoscale Voltage-Controlled Magnetic Tunnel Junctions" was published by researchers at Northwestern University, Western Digital Corporation, Fe Research Inc., and University of Messina. Abstract: "With the fast growth of the number of electronic devices on the internet of things (IoT), hardware-based securi... » read more

Why Countermeasures Are Needed To Prevent Practical, Non-Invasive Attacks Against CNT-PUFs


A technical paper titled "Practical Non-Invasive Probing Attacks Against Novel Carbon-Nanotube-Based Physical Unclonable Functions" was published by researchers at University of Passau, Chemnitz University of Technology, Fraunhofer Institute for Electronic Nano Systems, and Technical University of Darmstad. Abstract: "As the number of devices being interconnected increases, so does also the d... » read more

Search Based Method For Identifying Aging Model Parameters


A technical paper titled “Leveraging Public Information to Fit a Compact Hot Carrier Injection Model to a Target Technology” was published by researchers at University of Victoria. Abstract: "The design of countermeasures against integrated circuit counterfeit recycling requires the ability to simulate aging in CMOS devices. Electronic design automation tools commonly provide this ability... » read more

Protecting Power Management Circuits Against Trojan Attacks


A technical paper titled “Hardware Trojans in Power Conversion Circuits” was published by researchers at UC Davis. Abstract: "This report investigates the potential impact of a Trojan attack on power conversion circuits, specifically a switching signal attack designed to trigger a locking of the pulse width modulation (PWM) signal that goes to a power field-effect transistor (FET). The fi... » read more

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