Securing Advanced Packaging Supply Chain With Inherent HW Identifiers Using Imaging Techniques


A new technical paper titled "Fault-marking: defect-pattern leveraged inherent fingerprinting of advanced IC package with thermoreflectance imaging" was published by researchers at University of Florida and University of Cincinnati. "This work visits the existing challenges and limitations of traditional embedded fingerprinting and watermarking approaches, and proposes the notion of inherent... » read more

Lightweight, High-Performance CPU Extension for Protected Key Handles with CPU-Enforced Usage (CISPA, Ruhr Univ. Bochum)


A new technical paper titled "KeyVisor -- A Lightweight ISA Extension for Protected Key Handles with CPU-enforced Usage Policies" was published by researchers at CISPA Helmholtz Center for Information Security and Ruhr University Bochum. Abstract "The confidentiality of cryptographic keys is essential for the security of protection schemes used for communication, file encryption, and outsou... » read more

Rowhammer Protection By Addressing Root Cause (Georgia Tech)


A new technical paper titled "Preventing Rowhammer Exploits via Low-Cost Domain-Aware Memory Allocation" was published by researchers at Georgia Tech. Abstract "Rowhammer is a hardware security vulnerability at the heart of every system with modern DRAM-based memory. Despite its discovery a decade ago, comprehensive defenses remain elusive, while the probability of successful attacks grows ... » read more

Better Security and Power Efficiency of Ascon HW Implementation with STT-MRAM (CEA, et al.)


A new technical paper titled "Enhancing Security and Power Efficiency of Ascon Hardware Implementation with STT-MRAM" was published by researchers at CEA, Leti, Université Grenoble Alpes, CNRS, and Spintec. Abstract "With the outstanding growth of Internet of Things (IoT) devices, security and power efficiency of integrated circuits can no longer be overlooked. Current approved standards f... » read more

SIA’s Report On the State of the U.S. Semiconductor Industry


The Semiconductor Industry Association released its 2024 State of the U.S. Semiconductor Industry report this week, highlighting opportunities for growth, current and emerging challenges, and relevant metrics.  The report reviews the progress made on implementation of the CHIPS Act and associated manufacturing incentives. Supply chain rebalancing, workforce challenges, geopolitics and globa... » read more

Hardware-Side-Channel Leakage Contracts That Account For Glitches and Transitions (TU Graz)


A new technical paper titled "Closing the Gap: Leakage Contracts for Processors with Transitions and Glitches" was published by researchers at Graz University of Technology. Abstract "Security verification of masked software implementations of cryptographic algorithms must account for microarchitectural side-effects of CPUs. Leakage contracts were proposed to provide a formal separation bet... » read more

Hardware Security: One-Key Premise of Logic Locking


A new technical paper titled "Late Breaking Results: On the One-Key Premise of Logic Locking" was published by researchers at Synopsys. Abstract "The evaluation of logic locking methods has long been predicated on an implicit assumption that only the correct key can unveil the true functionality of a protected circuit. Consequently, a locking technique is deemed secure if it resists a good ... » read more

A HW-Based Correct Execution Environment Supporting Virtual Memory (Korea U., KAIST)


A new technical paper titled "A Hardware-Based Correct Execution Environment Supporting Virtual Memory" was published by researchers at Korea University, Korea Advanced Institute of Science and Technology and other universities. Abstract "The rapid increase in data generation has led to outsourcing computation to cloud service providers, allowing clients to handle large tasks without inve... » read more

A Generic Approach For Fuzzing Arbitrary Hypervisors


A technical paper titled “HYPERPILL: Fuzzing for Hypervisor-bugs by Leveraging the Hardware Virtualization Interface” was presented at the August 2024 USENIX Security Symposium by researchers at EPFL, Boston University, and Zhejiang University. Abstract: "The security guarantees of cloud computing depend on the isolation guarantees of the underlying hypervisors. Prior works have presented... » read more

A Novel Attack For Depleting DNN Model Inference With Runtime Code Fault Injections


A technical paper titled “Yes, One-Bit-Flip Matters! Universal DNN Model Inference Depletion with Runtime Code Fault Injection” was presented at the August 2024 USENIX Security Symposium by researchers at Peng Cheng Laboratory, Shanghai Jiao Tong University, CSIRO's Data61, University of Western Australia, and University of Waterloo. Abstract: "We propose, FrameFlip, a novel attack ... » read more

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