Large Area Process For Atomically Thin 2D Semiconductor, Using Scalable ALD


A new technical paper titled "Large-area synthesis of high electrical performance MoS2  by a commercially scalable atomic layer deposition process" by researchers at the University of Southampton, LMU Munich, and VTT Technical Research Centre of Finland. Abstract: "This work demonstrates a large area process for atomically thin 2D semiconductors to unlock the technological upscale required... » read more

Innovations in Device Design of The Gate-All-Around (GAA) Nanosheet FETs (IBM Research)


A technical paper titled "A Review of the Gate-All-Around Nanosheet FET Process Opportunities" was published by researchers at IBM Research Albany. Abstract: "In this paper, the innovations in device design of the gate-all-around (GAA) nanosheet FET are reviewed. These innovations span enablement of multiple threshold voltages and bottom dielectric isolation in addition to impact of channel... » read more

Ferroelectric HEMT Reconfigurable Transistor (U. of Michigan)


A new technical paper titled "Fully epitaxial, monolithic ScAlN/AlGaN/GaN ferroelectric HEMT" was published by researchers at University of Michigan. “We can make our ferroelectric HEMT reconfigurable,” That means it can function as several devices, such as one amplifier working as several amplifiers that we can dynamically control. This allows us to reduce the circuit area and lower the... » read more

Reducing Contact Resistance in Developing Transistors Based On 2D Materials


A new technical paper titled "WS2 Transistors with Sulfur Atoms Being Replaced at the Interface: First-Principles Quantum-Transport Study" was published by researchers at National Yang Ming Chiao Tung University. Abstract "Reducing the contact resistance is one of the major challenges in developing transistors based on two-dimensional materials. In this study, we perform first-principles ... » read more

Large Area Synthesis of 2D Material Hexagonal Boron Nitride, Improving Device Characteristics of Graphene


A new technical paper titled "Large-area synthesis and transfer of multilayer hexagonal boron nitride for enhanced graphene device arrays" was published by researchers at Kyushu University, National Institute of Advanced Industrial Science and Technology (AIST), and Osaka University. Abstract "Multilayer hexagonal boron nitride (hBN) can be used to preserve the intrinsic physical properti... » read more

Ternary LIM Operation of the TNAND and TNOR Universal Gates Using DG Feedback FETs


A technical paper titled "Logic-in-Memory Operation of Ternary NAND/NOR Universal Logic Gates using Double-Gated Feedback Field-Effect Transistors" was published by researchers at Korea University. Abstract "In this study, the logic-in-memory operations are demonstrated of ternary NAND and NOR logic gates consisting of double-gated feedback field-effect transistors. The component transistor... » read more

Fabricating Multi-Walled Carbon Nanotubes On Plastic Film


A new technical paper titled "Direct formation of carbon nanotube wiring with controlled electrical resistance on plastic films" was published by researchers at Tokyo University of Science. The paper states, "we have developed a simple method to fabricate multi-walled carbon nanotube (MWNT) wiring on a plastic film at room temperature under atmosphere pressure. By irradiating a MWNT thin fil... » read more

Asynchronously Parallel Optimization Method For Sizing Analog Transistors Using Deep Neural Network Learning


A new technical paper titled "APOSTLE: Asynchronously Parallel Optimization for Sizing Analog Transistors Using DNN Learning" was published by researchers at UT Austin and Analog Devices. Abstract "Analog circuit sizing is a high-cost process in terms of the manual effort invested and the computation time spent. With rapidly developing technology and high market demand, bringing automated s... » read more

Solid-State Electrochemical Thermal Transistor Without Using Liquid


A new technical paper titled "Solid-State Electrochemical Thermal Transistors" was published by researchers at Hokkaido University, Pusan National University, and the University of Tokyo. Abstract "Thermal transistors that electrically control heat flow have attracted growing attention as thermal management devices and phonon logic circuits. Although several thermal transistors are demons... » read more

Review Paper: Negative Capacitance GAA-FET


A new technical paper titled "Recent Developments in Negative Capacitance Gate-All-Around Field Effect Transistors: A Review" by researchers at PKU-HKUST Shenzhen-Hong Kong Institution and Shenzhen Institute of Peking University. "The novel device structure of negative capacitance gate all around field effect transistor (NC GAA-FET) can combine both the advantages of GAA-FET and NC-FET, and ... » read more

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