Challenges In Photonics Testing


Photonics is poised for significant growth due a rapid increase in data volumes and the need to move that data quickly and with minimal heat. But to reach its full potential photonics will have to overcome several production hurdles. The biggest challenge today involves alignment. While the industry is poised to produce billions of units, it still relies on testing practices that don't scale. ... » read more

Challenges Grow For CD-SEMs At 5nm And Beyond


CD-SEM, the workhorse metrology tool used by fabs for process control, is facing big challenges at 5nm and below. Traditionally, CD-SEM imaging has relied on a limited number of image frames for averaging, which is necessary both to maintain throughput speeds and to minimize sample damage from the electron beam itself. As dimensions get smaller, these limitations result in higher levels of n... » read more

Metrology Strategies For 2nm Processes


Metrology and wafer inspection processes are changing to keep up with evolving and new device applications. While fab floors still have plenty of OCD tools, ellipsometers, and CD-SEMs, new systems are taking on the increasingly 3D nature of structures and the new materials they incorporate. For instance, processes like hybrid bonding, 3D NAND flash devices, and nanosheet FETs are pushing the bo... » read more

Test Challenges Mount As Demands For Reliability Increase


An emphasis of improving semiconductor quality is beginning to spread well beyond just data centers and automotive applications, where ICs play a role in mission- and safety-critical applications. But this focus on improved reliability is ratcheting up pressure throughout the test community, from lab to fab and into the field, in products where transistor density continues to grow — and wh... » read more

Standards: The Next Step For Silicon Photonics


Testing silicon photonics is becoming more critical and more complicated as the technology is used in new applications ranging from medicine to cryptography, lidar, and quantum computing, but how to do that in a way that is both consistent and predictable is still unresolved. For the past three decades, photonics largely has been an enabler for high-speed communications, a lucrative market t... » read more

Hunting For Hardware-Related Errors In Data Centers


The semiconductor industry is urgently pursuing design, monitoring, and testing strategies to help identify and eliminate hardware defects that can cause catastrophic errors. Corrupt execution errors, also known as silent data errors, cannot be fully isolated at test — even with system-level testing — because they occur only under specific conditions. To sort out the environmental condit... » read more

Bump Reliability is Challenged By Latent Defects


Thermal stress is a well-known problem in advanced packaging, along with the challenges of mechanical stress. Both are exacerbated by heterogenous integration, which often requires mingling materials with incompatible coefficients of thermal expansion (CTE). Effects are already showing up and will likely only get worse as package densities increase beyond 1,000 bumps per chip. “You comb... » read more

Ramping Up IC Predictive Maintenance


The chip industry is starting to add technology that can predict impending failures early enough to stave off serious problems, both in manufacturing and in the field. Engineers increasingly are employing in-circuit monitors embedded in SoC designs to catch device failures earlier in the production flow. But for ICs in the field, data tracing from design to application use only recently has ... » read more

Screening For Silent Data Errors


Engineers are beginning to understand the causes of silent data errors (SDEs) and the data center failures they cause, both of which can be reduced by increasing test coverage and boosting inspection on critical layers. Silent data errors are so named because if engineers don’t look for them, then they don’t know they exist. Unlike other kinds of faulty behaviors, these errors also can c... » read more

Metrology Options Increase As Device Needs Shift


Semiconductor fabs are taking an ‘all hands on deck’ approach to solving tough metrology and yield management challenges, combining tools, processes, and other technologies as the chip industry transitions to nanosheet transistors on the front end and heterogenous integration on the back end. Optical and e-beam tools are being extended, while X-ray inspection is being added on a case-by-... » read more

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