Causes Of Memory Unsafety

Memory unsafety is a characteristic of many of today’s systems. The root cause of buffer bounds vulnerabilities such as buffer overflows and over-reads is unsafe programming. Major software vendors consistently report memory unsafety problems. For example, the Chromium open-source browser project has stated that 69% of CVEs (Common Vulnerabilities and Exposures) reported relate to memory... » read more

Formal Verification Best Practices: Investigating A Deadlock

To ensure a design is deadlock free with formal verification, one approach consists in verifying that it is “always eventually” able to respond to a request. The wording is important. Regardless of the current state and the number of cycles we must wait, in the future the design must respond. This translates very nicely using a type of SystemVerilog Assertion called “liveness propertie... » read more

RISC-V Customization Gets A Standing Ovation

Processor vendors have always tried to create a large software ecosystem around their products, because it creates stickiness and it naturally “locks-in” large numbers of customers who have invested in the creation of dedicated software. This effect is growing over time as the quantity of software is ever increasing per product: we could talk about more than 100 million lines of code in a c... » read more

Re-Targetable LLVM C/C++ Compiler For RISC-V

RISC-V is a modular instruction set architecture (ISA) with great customization capabilities that enable innovation and differentiation without fragmentation. On top of the baseline modules from ratified/standard ISA extensions, such as integer instructions or floating-point instructions, designers can add custom instructions: pure design freedom! And the reasons for adding instructions are man... » read more

Developing A Customized RISC-V Core For MEMS Sensors

We recently described how Codasip Labs is working with the NimbleAI project to push the boundaries of neuromorphic vision. Let’s talk about another cool project. This project is focused on another sense, hearing. We will use our unique Codasip Studio design toolset to develop a customized RISC-V core for MEMS (micro-electro-mechanical system) sensors. Again, technology is inspired by bio... » read more

No One-Size-Fits-All Approach To RISC-V Processor Optimization

As the demand for high-performance processors continues to grow and semiconductor scaling laws continue to show their limits, the need for processor optimization is inevitable. As I explained in a previous blog, RISC-V is designed to enable this. However, there is no one-size-fits-all approach to processor optimization. As each workload and each application will have their own requirements, th... » read more

Working With The NimbleAI Project To Push The Boundaries Of Neuromorphic Vision

At the end of 2022, the EU kicked off a cool project that aims to implement neuromorphic vision. But what is that? Let’s take a deeper look at the project and our contribution. First, if you are not familiar with Codasip Labs, I want to mention this briefly. Codasip Labs is in fact our innovation hub where we explore new technologies and try to contribute to the technology of the future. ... » read more

Embedded World 2023: It’s Time To Architect All Ambitions With Custom Compute

As soon as we arrived in Nuremberg, we could feel the city was buzzing and ready for a great Embedded World 2023 conference. It was hard to avoid exhibitors, speakers, and visitors at breakfast in the hotel or at dinner in restaurants – not to mention the waves in the metro! It was my first time at the conference, and I found the number of attendees and the quality of discussions very satisf... » read more

Make The Right Choices For Enhanced Security On RISC-V

Two things are certain to make their presence felt at Embedded World 2023: the growing presence of RISC-V and the importance of safety and security in any embedded system. The breadth of RISC-V applications is expanding rapidly from IoT, mobile devices, to high performance computing, automotive and more. Its adoption, along with RISC-V International memberships, is also expanding from start... » read more

5 Takeaways From The RISC-V Summit

After an intense week at the 2022 RISC-V Summit in San Jose, California, I am fueled with energy and positive thoughts. I had plenty of time to reflect on the event, which was unique in many ways. A lot happened in a few days for us at Codasip as well as for the wider RISC-V community, and here are 5 things I will remember from this conference. 1. RISC-V is inevitable If you have read our a... » read more

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