Being A Design Verification Engineer Is Fun And Rewarding

Philippe Luc, director of verification at Codasip, talked to students of the UK Electronics Skills Foundation (UKESF) about what it is like to be a verification engineer. On one hand the UKESF encourages young people to study electronics and pursue careers in this sector, and on the other hand Codasip is very keen to help prepare the engineers who will solve tomorrow’s technology chall... » read more

5 Good Things About RISC-V

RISC-V has been around for some time now, and if you are here it’s because you have heard of it. But perhaps you still need to be convinced that it is the future? If you still wonder about its potential and benefits, here are five good things about RISC-V. 1. RISC-V is an open standard Let’s start simple. This is nothing new, but let’s be clear on what open standard means. Open stan... » read more

Collaboration Leading The Way For Broad RISC-V Adoption

We recently announced a partnership with Intel as part of the launch of the Intel Pathfinder for RISC-V, making leading RISC-V technology more accessible for prototyping, production design or research purposes using Intel FPGAs. Intel Pathfinder for RISC-V allows for a variety of RISC-V cores and other IP to be instantiated on FPGA platforms, with the ability to run industry-leading oper... » read more

Processor Design Automation To Drive Innovation And Foster Differentiation

With semiconductor scaling no longer being an option in most situations, optimization means customizing the processor for your specific application. With the right approach and right tools, processor design automation can enable innovation and differentiation. One way of achieving this is to create an application-specific processor by owning the design. To do this efficiently, manual efforts sh... » read more

DAC 2022: Is It Too Risky Not To Adopt RISC-V?

I was fortunate enough to attend the 59th Design Automation Conference (DAC) in San Francisco. Aside from the Covid closure in 2020 I’ve been going to DAC since 1995. Many people, including me, arrived to San Francisco with a bit of trepidation. After all, 58th DAC had low attendance and it was only about 7 months ago. What was the DAC 2022 conference going to be like? How would Covid affec... » read more

Building The Highway To Automotive Innovation

The semiconductor industry has changed and nowhere is this more visible than in the automotive industry. Global chip shortages have highlighted how dependent we are on silicon to keep cars on the roads. These shortages are also keeping wait times for new vehicles at an all-time high. Add to this an influx of non-traditional players into the market and it's easy to see why the automotive sect... » read more

Differentiation And Architecture Licenses In RISC‑V

I was discussing with a colleague about the concept of architecture license in RISC-V. I realized that, in the open-source world, it can be a little tricky to grasp. In a traditional processor IP model, there is a clear distinction between an off-the-shelf IP license that gives some level of configuration but no customization and a fairly expensive architecture license enabling ... » read more

Measuring The Complexity Of Processor Bugs To Improve Testbench Quality

I am often asked the question “When is the processor verification done?” or in other words “how do I measure the efficiency of my testbench and how can I be confident in the quality of the verification?” There is no easy answer. There are several common indicators used in the industry such as coverage and bug curve. While they are absolutely necessary, these are not enough to reach the ... » read more

Improve Your Verification Methodology: Hunt Bugs Flying In Squadrons

After analyzing bugs on several generations of CPUs, I came to the conclusion that “bugs fly in squadrons.” In other words, when a bug is found in a given area of the design, the probability that there are other bugs with similar conditions, in the same area of the design, is quite high. Processor bugs don’t fly alone Finding a CPU bug is always satisfying, however it should not be an e... » read more

How To Extend The ‘Unscalable’ RISC Architectures

A couple of years ago, Erik McClure (a Microsoft software developer, at the time) published a blog entitled RISC Is Fundamentally Unscalable.  This blog was really quite interesting and made some very good points about the limitations of a pure RISC design. The limitations of a pure RISC design It takes me back: some of my first marketing tasks were around the religious war between RISC ... » read more

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