category: Embedded Customization

category: IoT, Security & Automotive

Growth And Enthusiasm At The RISC-V Summit 2021
By Rupert Baines - 22 Dec, 2021 - Comments: 0

We weren’t sure what to expect from our first major attendance at a #RISCVSummit. Although we were a founding member of RISC-V – as we’ve been saying quite a lot recently – we have been hiding our light under a bushel. We’ve certainly been busy though – enabling over 2 billion RISC-V cores with our RISC-V processor IP and Studio tools while helping customers use architecture lice... » read more

Customize Off-The-Shelf Processor IP
By Roddy Urquhart - 28 Oct, 2021 - Comments: 0

Processor customization is one approach to optimizing a processor IP core to handle a certain workload. In some case it makes sense to design a dedicated core from scratch, but in many cases an existing core may partially meet your requirements and can be a good starting point for your optimized core. In the past some processor IP vendors, notably ARC and Tensilica, offered extensible cores ... » read more

Why It’s The Perfect Time To Be Part Of The RISC-V Revolution
By Rupert Baines - 23 Sep, 2021 - Comments: 1

Eighteen months ago, I said: “The rise of RISC-V offers us a tremendous platform for innovation and collaboration: it has the potential to change the business model of the entire industry.” I stand by that and indeed am demonstrating my conviction by joining the ranks of a company that’s not only changing the industry business model, but is significantly innovating in RISC-V. Having ... » read more

The Difference Between Processor Configuration And Customization
By Roddy Urquhart - 26 Aug, 2021 - Comments: 0

For many years, people have been talking about configuring processor IP cores, but especially with growing interest in the open RISC-V ISA, there is much more talk about customization. So, what is the difference? A simple analogy is to think of ordering a pizza. With most pizzerias, you have standard bases and a choice of toppings from a limited list. You can configure the pizza to the ... » read more

Is RISC-V The Future?
By Roddy Urquhart - 29 Jul, 2021 - Comments: 4

Is RISC-V the future? This is a question that we often get asked, and let’s assume that we mean ‘is RISC-V going to be the dominant ISA in the processor market?’ This is certainly an unfolding situation and has changed significantly in the last five years. RISC-V originated at the University of California, Berkeley, in 2010 and took a number of years to get traction with industry. A bi... » read more

An Introduction To Domain-Specific Accelerators
By Roddy Urquhart - 24 Jun, 2021 - Comments: 0

After 50 years, Moore’s Law, Dennard Scaling, and Amdahl’s Law are failing. The semiconductor industry much change, and processor paradigms must change with it. So what exactly are domain-specific accelerators and why are they so important in light of the failure of these semiconductor scaling laws? » read more

The Road To Domain-Specific Accelerators
By Roddy Urquhart - 27 May, 2021 - Comments: 0

For about fifty years, IC designers have been relying on different types of semiconductor scaling to achieve gains in performance. Best known is Moore’s Law, which predicted that the number of transistors in a given silicon area and clock frequency would double every two years. This was combined with Dennard scaling, which predicted that with silicon geometries and supply voltages shrinki... » read more

What Is An ASIP?
By Roddy Urquhart - 22 Apr, 2021 - Comments: 0

ASIP stands for “application-specific instruction-set processor” and simply means a processor which has been designed to be optimal for a particular application or domain. General-purpose versus application- or domain-specific processors Most processor cores to date have been general-purpose, which means that they have been designed to handle a wide range of applications with good average... » read more

What Does RISC-V Stand For?
By Roddy Urquhart - 29 Mar, 2021 - Comments: 1

RISC-V (pronounced “risk-five”) stands for ‘reduced instruction set computer (RISC) five’. The number five refers to the number of generations of RISC architecture that were developed at the University of California, Berkeley since 1981. The RISC concept (like the parallel MIPS development in Stanford University) was motivated by the fact that most processor instructions were not... » read more

Customizing An Existing RISC-V Processor
By Roddy Urquhart - 25 Feb, 2021 - Comments: 0

In a previous post, we considered how you could create an optimized ISA for a domain-specific processor core by profiling software and experimenting with adding/removing instructions. Using the open RISC-V ISA can be a great starting point for a processor that combines application-specific capabilities and access to portable software. The old-fashioned way to modify the instruction set wo... » read more

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