Barriers between processor types are breaking down and more complex, higher performance RISC-V cores are on the horizon.
Is RISC-V the future? This is a question that we often get asked, and let’s assume that we mean ‘is RISC-V going to be the dominant ISA in the processor market?’ This is certainly an unfolding situation and has changed significantly in the last five years.
RISC-V originated at the University of California, Berkeley, in 2010 and took a number of years to get traction with industry. A big step forward was the formation of the RISC-V Foundation in 2015 as a non-profit organization to drive the adoption of RISC-V. In early 2020, the RISC-V Foundation activity was re-branded and re-incorporated as the Swiss-based RISC-V International.
I remember exhibiting at Embedded World in 2017 and the Codasip stand had the RISC-V logo prominently displayed. Many visitors asked, “what is RISC-V?”, showing that awareness in Europe was low. Since then, the situation has changed dramatically with a high level of interest in all geographies.
For many years, we have tended to classify processors into silos such as MPU, MCU, GPU, APU, DSP, etc. Some devices, such as mobile phones, would combine multiple types of processor cores in their designs. If we think back to, say, 2016, the MPU world was dominated by the X86 architecture while Arm dominated both APUs (application processors and the mobile phone ecosystem generally) and MCUs.
Today there are a few new trends that we can identify in the market.
In the early years of RISC-V, it was mainly used on academic projects. However, by 2016 a wide range of commercial companies were developing embedded microcontrollers based on the RISC-V ISA. It could be argued that this was a relatively easy step for the RISC-V community, given that embedded developers are used to building their systems from a variety of sources, including middleware delivered as source code. Also embedded cores are simpler in complexity.
RISC-V processor performance trending upwards. Source: Codasip.
What is more challenging is moving into application processors, with considerably more complexity required to support rich operating systems such as Linux or Android. In the case of mobile phone applications, there is a complex ecosystem which will take a while for RISC-V vendors to support. Nevertheless, there are plenty of other opportunities for RISC-V application processors in systems which use Linux, and there is a choice of IP cores such as Codasip’s A70X addressing mid-range performance.
Finally, we can expect more and more suppliers to create complex RISC-V cores for high-performance computing in the future.
With semiconductor scaling failing, the boundaries between traditional processor silos are blurring. With more and more demand for domain specific accelerators to achieve cost-effective performance on-chip, it is more and more necessary to tune the design to the needs of the workload required.
With the RISC-V ISA, having a minimalist base integer instruction set and providing for custom extensions, it is an ideal starting point for creating special accelerators.
While some applications, such as mobile phones, with complex legacy software are unlikely to change architecture in the short term, others have no constraints. New applications, such as artificial intelligence, are moving to RISC-V as the open ISA with flexibility and customization. And in a more distant future, RISC-V has the potential to gain even greater market share as legacy considerations cease to apply.
Finally, there is a strong desire for change in the processor market. Since the 1980s, microprocessors have been dominated by the Intel/AMD X86 duopoly, but in the late 1990s, Arm became the de-facto standard in the mobile phone processor market. That monopoly extended further into adjacent areas, including embedded.
For the last decade, I have often heard engineers talk of “Arm fatigue” and disquiet with the monopolist position and vendor lock-in in key markets. However, as long as Arm could claim ‘Swiss neutrality’ with their broad product range, nobody would be fired for licensing Arm. With their acquisition by SoftBank, that neutrality was seriously eroded, and the possible Nvidia merger may mean that Arm, having singled one of their former customers out for strategic partnership, won’t eventually be considered a safe choice at all.
The free and open RISC-V ISA has seen widespread interest and is likely to be a catalyst for a sea change in the market. As a standard, it has the potential to be relevant for decades, and with multiple suppliers offering processor cores, it avoids vendor lock-in.
RISC-V shipments predicted to grow strongly. Source: Semico Research Corporation.
While nobody expects architectures with a rich history – such as X86 or Arm – to disappear overnight, for the first time in decades designers have a viable alternative in RISC-V. With RISC-V covering a greater and greater range of performance and having a rapidly expanding ecosystem, the market share for RISC-V will continue to grow. This is reflected by market reports such as Semico Research, predicting that the market will consume 62.4 billion RISC-V CPU cores by 2025.
RISC-V surely has a rapidly growing future and a great chance of being a dominant architecture.
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Contemporary microprocessors contain 8 specific hardware components: (1) SMT (Simultaneous Multithreading), (2) register renaming, (3) instruction reordering, (4) out-of-order execution, (5) speculative execution, (6) superscalar execution, (7) delayed branch, (8) branch prediction. These components make up some kind of a “magnificent eight” of components which essentially raise the performance of microprocessors. But unfortunately they are very complex. A processor core having these components is a full-fledged one otherwise it is good for simple applications, e. g. for embedded systems, and possibly as a carrier for accelerators. The “magnificent eight” of components is very hard to design, only the experienced firms and developers are able to do this, and much know-how is acquired. Particularly complex is the SMT. It is not surprising that some Intel processors, and the famous Apple’s M1 processor do not contain the SMTs. As far as I understand most of the developed RISC-V processors have no components from the “magnificent eight”, and are intended for embedded systems.
If a company is able create the full-fledged RISC-V processor with all “magnificent eight” components then it would be a serious achievement, and such RISC-V would be considered of the World’s class. Such a processor may be slightly better than x86, or ARM ones. Why slightly? For RISC-V is based on 40-year old ideas as RISC-V Foundation claims. There is no sense to port the huge x86 and ARM software ecosystems on it. Thus, RISC-V will never gain a victory over x86 and ARM. The only advantage of RISC-V-is open ISA. The World demands absolutely novel microprocessor having much more higher performance than all contemporary ones. And there is a novel highly promising perspective solution. Thus, the RISC-V has really blur future.
I am not an expert but some RISC-V processors do have Ooo execution and branch predication like the U84 from SiFive and the 900 series from nucleisys. In fact the first RISC-V processor i ever heard about was an out-of-order processor called BOOM.
Almost all RISC-V cores are basic in-order cores. There are a few OoO designs, but they are also very basic and slow. There are no devboards with fast RISC-V cores, at best you can get a low-clocked in-order core (U74) at a fraction of the performance of a PI 3. There is no OoO RISC-V silicon available – the U84 appears to have been cancelled. There isn’t even RISC-V silicon with the official vector extension. So no OoO, no vectors, low clocks, just the basic MIPS ISA rehashed from the 80’s. Is this the amazing RISC-V future?!?
There is no doubt RISC-V shipments are in the hundreds of millions a year, but claiming 60+ billion in 3 years is ridiculous and totally impossible. Even 6 billion would be extremely optimistic.
However how many billion units are sold doesn’t even matter. Designing a decent OoO core is very expensive. Designing a core that can match Arm or Apple is even more expensive. Without a royalty stream from billions of cores, how are RISC-V designers going to pay the bills?
This is why I don’t think RISC-V can succeed beyond the simple embedded cores like we see today.
The X86 architecture made its name as part of the Wintel combination that dominated the PC space. Arm did not displace this but got traction in the mobile space which becme a huge market. Today there are many new emerging applications such as AI, edge computing, AR/VR among others which are green field opportunities which will grow to great volumes and are a wide open opportunity for RISC-V.
The RISC-V base integer ISA may have a historic link with the original RISC in UC Berkeley but with its modularity and custom instructions it is capable of a very wide set of applications.
Moving up in complexity will require a big emphasis on processor verification and design automation to be successful.