Beyond The RISC-V ISA

For chip architects and designers today, “the ISA” in RISC-V is a small consideration. The concern isn’t even choosing “the core.” Designers today are faced by a “whole system” problem—a problem of systemic complexity. That fact is implicit in the picture that I show people to explain the UltraSoC embedded analytics architecture. It shows a block-level representation of an So... » read more

Designing An Efficient DSP Solution

A look at the key challenges in DSP implementation from both hardware and software application perspectives, and how a properly selected and configured DSP processor coupled with an advanced software development toolchain can overcome these challenges. This white paper describes how to generate tight, efficient, and maintainable DSP code for a platform consisting of an IP core based on a specia... » read more

Alternative To x86, ARM Architectures?

Software developed by professors and graduate students from the University of California at Berkeley? That will never fly in the semiconductor industry, right? Maybe they said that about SPICE, four decades ago. The jury is still out on RISC-V (pronounced risk-five) the modular, open-source instruction set architecture created in this decade by Cal professors and students, yet the ISA is gai... » read more

Lightweight Cryptography For The IoE

This is the age where technology is expected to do more, faster, anonymously, and often invisibly. And it's supposed to use less power, with smaller footprints, unobtrusively and intuitively. And all that needs to be protected with cryptography. That's the goal, at least. But as Simon Blake-Wilson, vice president of products and marketing for [getentity id="22671" e_name="Rambus"]' Cryptogra... » read more