In-Memory Computing


Gideon Intrater, CTO at Adesto Technologies, talks about why in-memory computing is now being taken seriously again, years after it was first proposed as a possible option. What's changed is an explosion in data, and a recognition that it's too time- and energy-intensive to send all of that data back and forth between memories and processors on the same chip, let alone to the cloud and back. On... » read more

In Memory And Near-Memory Compute


Steven Woo, Rambus fellow and distinguished inventor, talks about the amount of power required to store data and to move it out of memory to where processing is done. This can include changes to memory, but it also can include rethinking compute architectures from the ground up to achieve up to 1 million times better performance in highly specialized systems. Related Find more memor... » read more

Memory In Microcontrollers


Gideon Intrater, CTO of Adesto, talks about how to use microcontrollers for applications where more memory is required, such as automotive, communication, and AI at the edge. Options include moving MCUs toward a more aggressive process node, adding external non-volatile memory, and execute-in-place types of architectures. » read more

Memory Options And Tradeoffs


Steven Woo, Rambus fellow and distinguished inventor, talks with Semiconductor Engineering about different memory options, why some are better than others for certain tasks, and what the tradeoffs are between the different memory types and architectures.     Related Articles/Videos Memory Tradeoffs Intensify In AI, Automotive Applications Why choosing memories and archi... » read more

Latency Under Load: HBM2 vs. GDDR6


Steven Woo, Rambus fellow and distinguished inventor, explains why data traffic and bandwidth are critical to choosing the type of DRAM, options for improving traffic flow in different memory types, and how this works with multiple memory types.   Related Video GDDR6 - HBM2 Tradeoffs Why designers choose one memory type over another. Applications for each were clearly delineate... » read more

New Challenges For Data Centers


Rita Horner, senior technical marketing manager in Synopsys’ Solutions Group, looks at the impact of a significant rise in data, why this often leads to big cost increases, and where the bottlenecks are occurring. » read more

Multi-Physics At 5/3nm


Joao Geada, chief technologist at ANSYS, talks about why timing, process, voltage, and temperature no longer can be considered independently of each other at the most advanced nodes, and why it becomes more critical as designs shrink from 7nm to 5nm and eventually to 3nm. In addition, more chips are being customized, and more of those chips are part of broader systems that may involve an AI com... » read more

GDDR6 – HBM2 Tradeoffs


Steven Woo, Rambus fellow and distinguished inventor, talks about why designers choose one memory type over another. Applications for each were clearly delineated in the past, but the lines are starting to blur. Nevertheless, tradeoffs remain around complexity, cost, performance, and power efficiency.   Related Video Latency Under Load: HBM2 vs. GDDR6 Why data traffic and bandw... » read more

2.5D, 3D Power Integrity


Chris Ortiz, principal applications engineer at ANSYS, zeroes in on some common issues that are showing up in 2.5D and 3D packaging, which were not obvious in the initial implementations of these packaging technologies. This includes everything from how to build a power delivery network to minimize the coupling between chips to dealing with variability and power integrity and placement of diffe... » read more

Boosting Analog Reliability


Aveek Sarkar, vice president of Synopsys’ Custom Compiler Group, talks about challenges with complex design rules, rigid design methodologies, and the gap between pre-layout and post-layout simulation at finFET nodes. https://youtu.be/JRYlYJ31LLw » read more

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