Tech Talk: Applying Machine Learning

Norman Chang, chief technologist at ANSYS, talks about real applications of machine learning for mechanical, fluid dynamics and chip-package-system design. » read more

Tech Talk: 7nm Process Variation

Ankur Gupta, director of field applications at ANSYS, discusses process variation and the problems it can cause at 10/7nm and beyond. » read more

Tech Talk: EM Crosstalk

Anand Raman, senior director at Helic, talks about the impact of electromagnetic interference on digital design at 10/7nm and beyond. Once confined to the analog space, noise is suddenly an issue at advanced nodes for all designs. At the root of the problem are smaller nodes, increased speed and higher levels of integration. » read more

Tech Talk: Substrate Noise Coupling

Roland Jancke, head of the department for design methodology for the Fraunhofer's Engineering of Adaptive Systems Division, talks with Semiconductor Engineering about the impact of substrate noise coupling on reliability of chips and how to deal with this issue. » read more

Tech Talk: Near-Threshold Power

Lauri Koskinen, CTO and founder of Minima Processor, and Ron Moore, vice president of marketing at ARM, talk about near-threshold computing, dynamic power and margining, and how these techniques can extend battery life and reduce energy consumption. » read more

Tech Talk: 7nm Thermal Effects

ANSYS' Karthik Srinivasan talks about the effect of heat on reliability at advanced process nodes, including self-heating, circuit aging, and how that will affect automotive electronics.   Related Tech Talk: 7nm Power Dealing with thermal effects, electromigration and other issues at the most advanced nodes. » read more

Tech Talk: ADAS

Arvind Vel, director of applications engineering at ANSYS, talks about the transition to self-driving cars and what will be required in future system designs. » read more

Tech Talk: 7nm Power

Annapoorna Krishnaswamy, lead applications engineer at ANSYS, talks with Semiconductor Engineering about power-related changes at 7nm and what engineering teams need to watch out for as they move down to the latest process technology. » read more

Tech Talk: Neural Networks

Megha Daga, senior technical marketing manager at Cadence, talks with Semiconductor Engineering about convolutional neural networks, including the bandwidth and compute challenges associated with them. » read more

Tech Talk: Power Signoff

Ansys' Aveek Sarkar the challenges of power signoff at advanced process nodes, the impact of over-design, and what's necessary for sufficient coverage. [youtube vid=VQoT2KYW-AM] » read more

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