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Problems In The Power Grid


The gap is widening between power availability and peak demand. Ritesh Tyagi, head of innovation and growth strategy at Infineon Technologies, talks about what needs to be done to fix the power grid, particularly as more cars are electrified and more electronic devices are mobile. While there currently is a surplus in power being generated on a macro level in the United States, for example, it... » read more

Improving Power & Performance Beyond Scaling


Steven Woo, Rambus fellow and distinguished inventor, discusses architectural changes inside of servers and data centers to allow pooling of resources such as memory. That has a big impact on power efficiency and overall performance, but it also allows data centers to customize their architectures and prioritized resources with much more granularity than they can do today. » read more

Changes In Sensors And DSPs


Pulin Desai, group director for product marketing, management and business development at Cadence, talks about why processing is moving closer to the end point, how to save energy through reduced area and sensor fusion, and the impact of specialization, 3D capture and always-on circuits. » read more

Data Overload In The Data Center


Dealing with increasing volumes of data inside of data centers requires an understanding of architectures, the flow of data between memory and processors, bandwidth, cache coherency and new memory types and interfaces. Gary Ruggles, senior product marketing manager at Synopsys, talks about how these systems are being revamped to improve performance and reduce power. » read more

112G SerDes Reliability


Priyank Shukla, product marketing manager at Synopsys, digs into 112Gbps SerDes, why it’s important to examine the performance of these devices in the context of a system, what is acceptable channel loss, and how density can affect performance, power and noise. » read more

Ins And Outs Of In-Circuit Monitoring


At 7nm and 5nm, in-circuit monitoring is becoming essential. Steve Crosher, CEO of Moortec, talks about the impact of rising complexity, how different use cases and implementations can affect reliability and uptime, and why measuring electrical, voltage and thermal stress can be used to statistically predict failures and improve reliability throughout a chip’s lifetime. » read more

Visualizing Differences In Analog Design


Prathna Sekar, technical account manager at ClioSoft, explains the challenges of managing analog versus digital IP, including how to deal with dozens or even hundreds of versions of a schematic, and why visualization is so important for identifying changes and updates to an analog design. » read more

High-Performance Memory For AI And HPC


Frank Ferro, senior director of product management at Rambus, examines the current performance bottlenecks in high-performance computing, drilling down into power and performance for different memory options, and explains what are the best solutions for different applications and why. » read more

Reliability In Automotive Chips


Roland Jancke, head of department for design methodology at Fraunhofer IIS’ Engineering of Adaptive Systems Division, looks at how to ensure that chips used in cars are reliable over extended periods of use, how mission profiles vary depending upon where they are used, and why it’s important to understand what chips developed at the latest nodes can really be used for and how they will be ... » read more

Where Timing And Voltage Intersect


João Geada, chief technologist at ANSYS, talks about the limitations for power delivery networks and what processors can handle, why the current solutions to these issues are causing failures, and how voltage reduction can affect timing. » read more

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