Ins And Outs Of In-Circuit Monitoring


At 7nm and 5nm, in-circuit monitoring is becoming essential. Steve Crosher, CEO of Moortec, talks about the impact of rising complexity, how different use cases and implementations can affect reliability and uptime, and why measuring electrical, voltage and thermal stress can be used to statistically predict failures and improve reliability throughout a chip’s lifetime. » read more

Visualizing Differences In Analog Design


Prathna Sekar, technical account manager at ClioSoft, explains the challenges of managing analog versus digital IP, including how to deal with dozens or even hundreds of versions of a schematic, and why visualization is so important for identifying changes and updates to an analog design. » read more

High-Performance Memory For AI And HPC


Frank Ferro, senior director of product management at Rambus, examines the current performance bottlenecks in high-performance computing, drilling down into power and performance for different memory options, and explains what are the best solutions for different applications and why. » read more

Reliability In Automotive Chips


Roland Jancke, head of department for design methodology at Fraunhofer IIS’ Engineering of Adaptive Systems Division, looks at how to ensure that chips used in cars are reliable over extended periods of use, how mission profiles vary depending upon where they are used, and why it’s important to understand what chips developed at the latest nodes can really be used for and how they will be ... » read more

Where Timing And Voltage Intersect


João Geada, chief technologist at ANSYS, talks about the limitations for power delivery networks and what processors can handle, why the current solutions to these issues are causing failures, and how voltage reduction can affect timing. » read more

Thermal Guardbanding


Stephen Crosher, CEO of Moortec, looks at the causes of thermal runaway in racks of servers and explains why accurate temperature measurement in AI and advanced-node chips is more critical, and what impact this has on performance when temperatures begin approaching acceptable limits. » read more

How Chips Age


Andre Lange, group manager for quality and reliability at Fraunhofer IIS’ Engineering of Adaptive Systems Division, talks about circuit aging, whether current methods of predicting reliability are accurate for chips developed at advanced process nodes, and where additional research is needed. » read more

Bridging Math And Engineering In ML


Steve Roddy, vice president of products for Arm’s Machine Learning Group, examines the intersection of high-level mathematics in the data science used in machine learning within area, speed, and power limitations, and how to bring these two worlds together with the least amount of disruption. » read more

Thermal Challenges In Advanced Packaging


CT Kao, product management director at Cadence, talks with Semiconductor Engineering about why packaging is so complicated, why power and heat vary with different use cases and over time, and why a realistic power map is essential particularly for AI chips, where some circuits are always on.   Interested in more Semiconductor Engineering videos? Sign-up for our YouTube channel here » read more

Electromagnetic Challenges In High-Speed Designs


ANSYS’ Anand Raman, senior director, and Nermin Selimovic, product sales specialist, talk with Semiconductor Engineering about how to deal with rising complexity and tighter tolerances in AI, 5G, high-speed SerDes and other chips developed at the latest process nodes where the emphasis is on high performance and low power. » read more

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