Three DFM “Litho” Checkpoints at SMIC

Design for manufacturing (DFM) has been an industry buzz word for several years, but now that it is an expected part of every design flow at 40nm and below, we are seeing how the concept of DFM can be successfully deployed. For example, Semiconductor Manufacturing International Corporation (SMIC), one of the world’s largest semiconductor foundries, has established a process for litho checking that is a good study in efficiency and ROI.

In 2009, SMIC began aggressively adding DFM sign-off requirements, and now mandates DFM at all levels, including full-chip, block and IP. A key requirement is that designs be free of lithography hotspots: layout structures that pose serious printability issues. To ensure litho-clean designs, SMIC instituted three checkpoints for hotspot checking, each with increasing stringency. Figure 1 illustrates the basic LFD checkpoint process SMIC follows.

Figure 1. SMIC uses three formal checkpoints to verify lithography-friendly layouts.

About Lithographic Hotspots

At advanced process nodes, random defects, process variations, and systematic distortions can make designs challenging to pattern on the wafer. Problem areas of the layout that will not print accurately are called lithography hotspots.

Hotspots are typically subdivided into “killer” and “warning” categories. The “killer” problems that must be fixed are layout patterns that cannot be printed. The “warning” hotspots are less critical for patterning, and will require more aggressive reticle enhancement techniques (RET) to print. It is nice to avoid them, or at least know early on that they exist in the design so enough time is allocated for RET.

Foundries typically struggle with how much of this second type to expose to their customers and what they should ask them to fix. On the one hand, it is better for time and yield to reduce these hotspots. On the other hand, foundries don’t want to be too strict on how clean the design has to be, that is, how much work their customers have to do before submitting the design to the foundry.

Three Checkpoints Makes Everyone’s Life Easier

To balance the requirements of the customer with the hotspot-clean requirements of manufacturing, SMIC established three different levels of litho hotspot checking.

Tapeout litho signoff checkpoint – done by designers
The first checkpoint is done by the customers, who use a tool like Mentor’s Calibre® LFD™ to catch all the “killer” hotspots. SMIC offers a tapeout signoff litho-friendly design (LFD) kit. The LFD kit contains all the necessary runsets and models. The Calibre LFD tool has a similar look and feel to the familiar Calibre DRC error browsing, so it is easy for SMIC’s customers to use. Calibre LFD is integrated with all place and route tools to drive hotspot auto-fixing. SMIC also qualifies other litho checking tools to give customers flexibility in tool decisions.

LFD FastMode litho checkpoint – done by SMIC
The second checkpoint is to be done at SMIC by the incoming tapeout-qualifying product engineering team. They use the Calibre FastMode LFD kit, which is currently under development, to check all “killer” and most “warning” hotspots. LFD FastMode first scans the chip for candidate hotspots, then runs litho simulation on these candidates only. This filtering allows for a more accurate check than SMIC requires from customers, but is faster than the most strict check performed by the production team. If the tapeout includes any “killer” hotspot, it is sent back to the customer for repair. If “warning” hotspots are found, they are communicated to the production team to prepare for extra RET for these locations. Advanced customers who would like to take the extra mile to ensure their designs are robust can request the LFD FastMode kit from SMIC and run it themselves.

LFD RegularMode litho checkpoint – done by SMIC
The third and most stringent litho hotspot checkpoint is done at SMIC by the production team to check for all types of hotspots using the Calibre RegularMode LFD kit.

The Business Case for Three Checkpoints

I asked LiFu Chang, the director of Technology R&D at SMIC about the motivation behind this three checkpoint process and about the effect it’s had on their business. He said this checkpoint process strikes a great balance between ensuring that tapeouts are litho clean enough to ensure a reasonable production cycle time, while not over restricting customers designs. The majority of the customers can use any qualified EDA tool to complete the first checkpoint. Advanced customers also have the option of completing the second, more thorough, checkpoint by requesting the qualified LFD FastMode kit from SMIC. Customers can use Calibre LFD within some place & route tools, which can improve hotspot fixing.

Weeding out the “killer” hotspots before tapeout allows SMIC to focus on doing the more value-add improvements to the design manufacturability so customers get the expected yield and reliability.

As lithography hotspot checking becomes a regular part of designs at 40nm and below, design houses and foundries alike are working out the best ways to implement these new requirements. Technical issues are not the only concern; ROI is also seen in how a company deploys DFM. SMIC is finding value and efficiency in their three checkpoint system of lithography hotspot detection.

Maged Attia is the product manager for LFD products at Mentor Graphics. He earned his MS in Electrical Engineering from UCLA and an MBA from the UCLA Anderson School of Management.