How The Evolution Of SoC Design Is Igniting Innovation Again

While consolidation continues among traditional semiconductor vendors, a wave of new entrepreneurs is flourishing.


A funny thing happened on the way to the future. The futurologists were proven wrong.

They said for years that the electronics industry was “consolidating,” and they sketched visions of a future that involved less innovation and openness, with fewer opportunities for entrepreneurs to deliver on their dreams.

Reality turned out to be different. Yes, consolidation continues among traditional semiconductor vendors who seek scale and the ability to serve as many application markets as cost-effectively possible. But electronics entrepreneurship instead has flourished. Who 15 years ago would have predicted the success of C.H.I.P., Raspberry Pi, BLOCKS, Enlighted, and countless other companies?

Each has thrived because they have access to semiconductor IP, hardware, software and ecosystem expertise that has propelled their ideas from mind to market quickly and cost-effectively.

The semiconductor ecosystem has responded to meet the demand. First there was semiconductor IP that could be leveraged across multiple customers, freeing those customers to focus on their particular value-add. Then came subsystems, interconnects, memories, tools to stitch everything together and verify it.

ARM introduced the DesignStart program more than a decade ago to provide physical IP and evaluations of the Cortex-M0. It has continued to evolve to provide fast access to proven ARM IP. Two years ago, ARM announced the availability of the enhanced ARM Cortex-M0 system in DesignStart, which kick-started a new wave of efficient, custom system-on-chip (SoC) development. Easy access to this kind of technology helped enable several hundred more embedded designers, start-ups, university researchers and OEMs to join and participate in the collaborative ARM ecosystem. Their resulting custom SoCs designs are enabling embedded intelligence in a diverse range of IoT and connected devices.

Now, we’re entering another evolutionary phase that’s changing the landscape again.

Consider that the cost to innovate continually falls in our industry. Nowhere is that clearer than in foundry processes, where older nodes have found astonishing staying power over many years, from 180nm, 90nm and 65nm – all the way down to 28nm. Process and design optimizations at these older nodes have made them compellingly affordable for smaller companies.  This has kindled more innovation because huge volumes are no longer a requirement to pull the trigger on a design.

Tirias Research recently published a detailed analysis of the economics of SoC design today.

“There has never been a better time to build your own custom ASIC,” Tirias wrote in its report. “Despite the talk of Moore’s Law slowing and the cost of new chips rising, there are many opportunities to turn your sensor-driver design or your multi-chip controller into a small ASIC to lower costs and protect your IP.”

Tirias points out that it can cost as little as $16,000 for prototype quantities, and costs are heavily dependent on the process node. Mask costs can double from one process generation to the next, such as 40nm to 28nm and 28nm to 16nm.

“But many IoT designs are well suited for older process nodes larger than 40nm; indeed, for mixed-signal devices, the analog components are often better served by 90 or 180nm,” Tirias wrote.

This situation creates opportunities for innovation that didn’t exist a few years ago – but we can’t simply rest on success, particularly if we want to create an environment that will deliver a trillion devices in the coming years.

That’s why ARM recently turned up the dial by expanding DesignStart to add the proven ARM Cortex-M3 processor to the already-available Cortex-M0 and eliminated the upfront license fees for the two processors in the program.

“Lower-cost ARM licenses for ARM Cortex-M0 and [Cortex-]M3 IP should further lower the bar for designing and manufacturing cost effective ASICs,” Tirias wrote. “Even start-ups that are bootstrapping with little capital can develop their designs using DesignStart with little risk.”

You can read the Tirias report here and learn more about DesignStart here. And don’t miss this useful webinar on how to start your next productive SoC design project.

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