Experts At The Table: IP Integration Hurdles

Second of three parts: Fewer large providers; questions about quality; focusing the ecosystem; how EDA will need to change.

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By Ed Sperling
Low-Power Engineering sat down to discuss IP integration issues with Ken Brock, senior staff product marketing manager for logic libraries in Synopsys’ Solutions Group; Kalar Rajendiran, senior director of marketing at eSilicon; Mike Gianfagna, vice president of marketing at Atrenta; and Jim McCanny, CEO of Altos Design Automation. What follows are excerpts of that conversation.

LPE: Who’s going to be able to play in the IP market?
Brock: As we get to smaller geometries it becomes a rich man’s game. It’s like Larry Ellison and America’s Cup; 28nm is very much like that. Tapeouts are expensive, variability is up, and you need consistency. Being able to have the IP that’s made in a consistent fashion is essential. Standards are driving some of that. Having the Liberty TAB, CPF and UPF are important. But how much verification do we really run before it’s done? How big is your SPICE farm? And customers are saying that rather than going to a large number of IP providers, they’d rather go to one. It’s one throat to choke.
Gianfagna: We’ve been selling Spyglass for years, but half of what it’s being used for recently doesn’t have anything to do with design. It’s for discovering what’s in IP that has been bought and trying to figure out what’s wrong with it and how to fix it. It’s discovery and improvement. If you have a tool that can optimize a design it also can tell you what’s wrong with it. That’s a new application. If you can figure out ways to better assess the quality of IP, it may be a trigger for how the industry can grow. That may help the small companies play in this market, too.
McCanny: Most of our efforts are focused on standard cells. There is a myriad of things you can do and you can’t do them all, but what is the best choice? It would be bad for the industry if we killed the innovation of the little guys. A lot of these little guys can become the big guys later on.

LPE: Is the future the little guys, or is it platforms of re-usable and integrated IP?
Gianfagna: It’s both. The market resists being homogenized. The more you get standardized platforms—and you will, because the complexity is going up and the number of tapeouts is going down—the more the market will provide differentiation. One change is that the startups will be more software-oriented rather than hardware-oriented.
Rajendiran: If you have a chip and 90% is standardized, there is less chance for differentiation. That’s one of the reasons software is taking off, but you also can’t do everything in software. Verifying the software is actually more complex than if you have well-defined operating and power modes in hardware. So hardware is still important and the IP is important. But to a large extent, the off-the-shelf part needs to be addressed by the big companies. The smaller companies need to come up with whiz-bang innovation. We still need small companies, but they have a challenge with the foundries on one side and the customers on the other if all they’re doing is the same stuff as the big companies. There’s a place for everyone, but to be successful they have to play their role. Even TSMC tried to do IP because they thought they would have better control if they did it themselves. That wasn’t the case.
Gianfagna: It’s an ecosystem, so everyone has to play their role and there has to be glue between these roles. For a long time, EDA has played a role of enabler for the end product for someone else. They’ve been a silent partner. EDA can be an enabler for business. If we’re right about the need for better validation and better incoming inspection of IP, whether it’s at the transistor-polygon level or the synthesizable RTL level, then EDA can become an enabler for the IP industry and collaboration across the ecosystem. It’s EDA providing value at a different level.
Brock: That’s correct. People are now using Spyglass to look into the black boxes. They used to build the black boxes before and it was good for that. If 70% or 80% of an IP on a chip is bought, it’s a different use. As an IP provider, we’re seeing that in different areas. There are natural places for standardized interfaces. There’s a committee that defines the standards, and you’re not going to differentiate by doing USB 2.0 or 3.0. You just have to have it. That’s a very natural place to play in the IP industry. What we’re seeing now is more of the vertical integration—what we’re calling IP subsystems. If someone needs an analog front end for a digital TV, you’ll have cells and memory but you also need a processor that does audio and soft codecs. But sometimes you also a hard analog codec. That’s where a lot of innovation happens. This can be done by small companies and they can become very successful.
McCanny: TSMC tried IP and they still have it, although they’re de-emphasizing it. EDA has picked up the baton. But do you think that’s the right place for IP? Is it so complex that you need to have the collaboration with the tools supplier to build it and validate it, or are we still in a world where IP and EDA are separate?
Brock: We used to be pure-play IP (at Virage Logic, now part of Synopsys). Now, working with all the EDA vendors and supporting mixed flows, I see a better need for collaboration. We need to be able to see into modeling. For the validation part, being able to pound on the IP for more corners and stress corners is important. But it still has to work with mixed flows.

LPE: Is an integrated EDA/IP company better?
Rajendiran: The EDA companies can have unlimited access to verification tools, whereas an IP company needs to buy the tools. But that doesn’t solve the problem. You have to work smarter. When you’re verifying something, how do you know you’re verifying the functionality correctly and have the right use mode? An IP company and an EDA company combination don’t make a product company. That domain knowledge needs to happen on a larger scale.
Gianfagna: It’s a good thing IP is migrating into EDA because you do have access to the tools. An IP release is a combination of careful program management, validation, ensuring all the parts are there. That’s all good. There’s a bad part of this, too. The IP industry has been able to have higher multiples than EDA and sell at a higher value. Let’s hope that EDA doesn’t mess up the IP industry and that IP can teach the EDA industry. The EDA industry is not known for its ability to get value from its investment.
McCanny: There is also the danger that because the multiples are so much higher in IP that EDA margins will shrink further because it will be packaged with IP.
Rajendiran: Give or take a half-billion dollars, the EDA has remained at $4 billion for a long time. The semiconductor industry is about $300 billion. If the married IP plus EDA can get even 2% of that, it’s a lot more than what’s available now. IP becomes part of the chip and it ships for many years, so you can deliver the IP and get a piece of that. With EDA, for all the hard work that goes into the tools, after tapeout there’s no more interaction.

LPE: Don’t the dynamics change? In the future you won’t be able to separate out the IP, the software and the hardware. The market may be bigger.
Gianfagna: It will definitely be bigger, and EDA companies can get a lot bigger along with that if they participate in that larger market.
Brock: That will be even greater if we get involved in the application software, the EDA, the IP and the software enabling the technology to make it all happen.
Gianfagna: They all become part of the mix. More of the differentiation will be in software and that’s going to require careful design and marriage to the hardware. That’s a new model. Right now we build a chip, throw it over the wall and say, ‘Make it work.’
Brock: That’s where a lot of the processors are making that easier.
Gianfagna: They’re enabling that model.
Brock: With a smart phone you’ll have one ARM core running the baseband processors, but there might be four or five ARC processors running the surround sound and the audio and a lot of these smaller applications. These are lightweight embedded cores that are buried on an SoC that can be programmed.
Gianfagna: The other opportunity is the platform. It’s a collection of IP that works together in a certain way and which can be modified predictably. There’s a lot of EDA in that. So is there a way that EDA companies can collaborate with semiconductor companies on the back end to make all of this happen? It’s a whole different model for EDA, which is in my opinion a healthier model.