Fundamentals For 3D IC Flows

While true 3D ICs are a few years off, 2.5D is here. There are some key differences, namely that with 2.5D the interposer is a passive die, but there also are some fundamental shared requirements.

Samta Bansal, senior product marketing for Silicon Realization at Cadence asserted that first, the digital, custom and package environments must be seamless. “There has to be a co-design between your custom, digital and package environment, because if you take a look at it, even 2.5D is a heterogeneous element. You can bring in analog, RF, a memory, sitting side by side with the logic die, which could be 28nm or 20nm, sitting on a passive silicon interposer, and that’s sitting on a package. There are a couple of our customers who consider silicon interposers as an extension of a package because it’s just a substrate. In that case, I think what fundamentally is important, whether it is 3D or 2.5D, is that your digital, custom and package environments are talking to each other seamlessly.”

She pointed out that within Cadence’s mixed-signal and SiP solutions, the three environments of digital, custom and package have been tightly coupled using OpenAccess.

The second fundamental requirement for 2.5D and 3D design is that the databases in digital, custom and package understand the new constructs and dimensions of TSVs—what are microbumps, what are backside metal, etc. —because these are new layout rules or there is a new layout layer in terms of backside metal, Bansal explained. “There are new alignment rules that come into play because of the microbumps. There are new layout and electrical features that come into play because of these. There are new models; there are new DRC, new floor-planning, and new blockages rules. There are thermal and mechanical constraints that need to be considered and have to be understood. All of these have to be inherently built in the tools to make sure that the database understands that and hence, the entire environment across digital, custom and package are pretty seamless.”

I find this reassuring; it doesn’t seem too long ago that most EDA vendors were saying that 3D wouldn’t cause too many disruptions to the flow. If Cadence’s work is any indication, there will indeed need to be a number of significant additions made to the existing 2D design flow to make sure 2.5D and 3D designs are accommodated.

A final comment: While Cadence’s explanation is detailed here, Synopsys and Mentor both have similar, ongoing work in this area too.

–Ann Mutschler