How To Shorten Hardware-Software Development Cycles

As customer windows shrink, “shift-left pressures” are compressing the end of the development process, resulting in a slightly shortened overall design process. How do pre-silicon development platforms relieve some of the pressure?

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Doing more hardware-software development prior to silicon promises significant productivity and time-to-market improvements. Part of this is shifting software development “to the left,” which can compress development

Last month, I blogged about “The Great Shift to the Left,” and I pointed out some of the organizational challenges associated with compressing the development cycle using pre-silicon development platforms. Last week, I attended the Electronic Design Process Symposium, and in the spirit of “left-shifting,” Intel’s Director for Pre-Silicon Platform Acceleration, Chris Lawless, gave a presentation titled “Going beyond Shift-left: Platform Acceleration with Pre-Silicon Prototyping Solutions.”

Chris described the shift in computing from servers, desktops and laptops (with their relatively long lead times) to markets such as tablets , micro-servers, phones and wearables (which are highly time-sensitive customized market solutions). With that, the value vectors for computing that traditionally had been evolved on the back of performance and density, are changing. The new challenges are new levels of flexibility — from high-performance servers to wearables, wide ranges of volumes and margins for same or similar designs and market-mandated refresh rates coupled with the tension for a need to deliver cutting-edge IPs. As a result, system on chip companies face two significant challenges. First, they need to participate in multiple segments to capitalize on opportunities for specialization. Second, they need to reduce time-to-market from concept to productization.

According to Chris, as customer windows shrink, the “shift-left pressures” are compressing the end of the development process, resulting in a slightly shortened overall design process. The introduction of pre-silicon development platforms relieve some of the pressure and have the potential to eliminate an explicit intermediate step for software integration by moving software development to the earlier phases. Here, the definition is still current and allows customization within customer windows. Then I heard something for the first time, at least publicly: Chris said that the challenges introduced earlier – needs for specialization and agility, for example – compress the front end of the development process as well. This allows teams to deal with potential missed opportunities for specialized products.

So what is needed? In order to meet the requirements of flexibility from servers to IoT wearables, a wide range of volumes and margins for similar designs and faster refresh rates, Chris offered a call to action for what his team needs from EDA vendors:

  • Solutions and standards that enable seamless reuse from IP through software. For instance, being able to reuse the same content as software drivers, validation of the design under development and even all the way to post silicon manufacturing tests.
  • Solutions that fit the development investment for varying cost points and complexity.
  • Solutions that help architecture definition and design be more agile, which includes fast architectural exploration and prototyping through the validation phase.

 

In further discussions during the day, other experts argued that teams need a seamless transition of models between the different engines and their combinations. One of the key issues, in-line with some of my previous comments in blogs, is that early models need to either be constantly updated to stay in sync, or they have to become an essential by-product of the development processes by becoming the golden source from which next representations in the development process are derived like implementations are derived today from RTL representations.

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Are we there yet? Well, we are getting closer. My presentation as part of EDPS last week was called “Combining TLM & RTL Techniques: A Silver Bullet for Pre-Silicon HW/SW Integration,” and did address some of the issues outlined by Chris’s presentation, specifically when it comes to combining the different engines and move models between them.

It was good to see that the direction we have taken with the System Development Suite seems to align well with customer requirements, helping to compress design processes!