Early and continuous integration is poised to shift development efforts left and to reduce overall development effort significantly.
Last December, the name of my predictions blog summarized my view crisply, which is that “applications, ecosystems and system complexity will be key verification drivers for 2020.” Slam dunk on these.
Application domains significantly impacted verification aspects in 2020. Who would have thought that Facebook and AWS would be among the keynotes at our user conference, speaking about how their artificial intelligence (AI) requirements led them to apply emulation and prototyping for their internal chip-designs?
Ecosystems also gained in criticality, with prominent examples being Arm’s rise into data centers with AWS’s Graviton 2, Arm’s architecture powering the most powerful supercomputer Fugaku, and RISC-V celebrating its 10th birthday in 2020. Processor architectures are at the center of critical ecosystems, but others are emerging, like the ecosystem of companies powering what we often refer to as the hyperscale era. They enable the journey of all the data that we end consumers create through devices, near and far edges, networks, and, ultimately, local and cloud data centers.
And the third item that I predicted as a verification driver—system complexity—clearly was correct, too. When looking at recent announcements from AMD, NVIDIA, and others, designs have become so complicated and significant that the yield-related issues of designing at the reticle limit have caused a shift towards assembling chiplets using 3D-IC assembly techniques. In turn, verifying chips of that complexity has fueled never-before-seen demand for verification throughput, and issues like server-readiness with the Arm Server Base System Architecture (SBSA) activities are better confirmed before silicon availability using emulation.
This year, my Cadence role has broadened from verification to looking at our products in the context of solutions. This change means that I am virtually looking at our products now through the lens of the eight Cadence target verticals: consumer, hyperscale computing, mobile, 5G communications, aerospace & defense, automotive, industrial, and healthcare.
And what a change of perspective this has been. While I was aware of the changes in some of the domains, the industry transformations’ scope, as I now understand it better, is much more significant than I thought. I did write about some of the related aspects here on Semiconductor Engineering throughout the year. Hyperscale computing and AI are reshaping value chains, and I likened the transformation in this area to the change that the mobile industry went through a decade earlier. The data center itself has gone through considerable changes in the last decade, as I outlined in “The Four Pillars of Hyperscale Computing.” Many more changes are just on the horizon, as companies like Google outlined in their keynotes that I referenced in “System Design for Next-Generation Hyperscale Data Centers.”
Other verticals are undergoing similar seismic shifts.
In the aerospace & defense industry, the Assistant Secretary of the Air Force for Acquisition, Technology, and Logistics, Dr. Will Roper, introduced a digital-focused acquisition model for new capabilities. Dr. Roper aptly called it “There Is No Spoon,” invoking the Matrix and new realities. His emphasis on digital engineering technologies, including digital twins’ application during the development, production, and operation of systems, signals a shift away from the old ways of pure waterfall development. Early and continuous integration, or what Dr. Roper called, “building an airplane the first time as if it were built 100 times,” is poised to shift development efforts left and to reduce the overall development effort significantly.
In the automotive vertical, we witness how the intricate design chain’s consumer-facing tier, the OEMs, are now considering their internal silicon design like Tesla did. Their resulting system on a chip (SoC) includes two AI processor cores and achieves a maximum performance of 144 TOPS at 72W (2 TOPS/W). The next generation of SoCs will probably target a couple of hundred TOPS with an even better TOPS/W ratio.
And similar shifts are happening in healthcare. I, for one, just got up because my step-tracker reminded me that I sat too long while writing this. Besides this gamification of health aspects, everything around my health has mostly gone digital. Other application domains are undergoing similar shifts, like the industrial internet of things (IIoT) and cyber-physical systems transforming how products are built and maintained.
Looking forward, we have to realize that the shift in most of these industries has just begun and will unfold over years to come. It is hard to predict winners and losers, only that changes will be significant. As I look back on my shelf and smile that I kept my Palm Pilot, a Blackberry, and my Ericsson GH337 phone—all of which seemed like ground-breaking technology at the time—I am looking forward to the new, exciting, hyper-scaled inventions to come. All of them will need to leverage the latest process technologies, combined with the latest EDA and computational software tools to implement them.
Combining the estimates of various analysts like CIMData and Omdia, we are looking at forecasts for 2024 of an EDA and IP market of about $12B, which is part of a PLM/computational software market of almost $70B, enabling more than $530B of semiconductors and $2.8T of electronics. The electronics future looks bright.
Here’s to the next 20 years!
I hope your holidays are happy. But even more, I hope you stay safe and healthy in 2021.
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