IP Tagging Resurfaces

Idea of being able to track IP resurfaces as amount of re-use and commercially developed IP inside of SoCs increases.


By Ed Sperling
System-Level Design sat down with Kathy Werner, IP strategy and business manager inside of Freescale’s Design Technology Organization, to discuss tagging of soft IP. What follows are excerpts of that conversation.

SLD: How new is the concept of IP tagging?
Werner: IP tagging has been around for a long time. VSI Alliance was one of the first standards organizations that looked at IP tagging. It started out as the Virtual Socket Interface Alliance. They had a number of initiatives they were addressing. One was the on-chip bus specification. They also did the quality IP specification, they started the encryption standard, looked at IP transfer, defined the list for standard deliverables. The goal was to facilitate IP re-use between design groups, between companies and between vendors and customers. Tagging was one of those efforts, and it really was intended to provide some security around IP. There were two aspects to this. One was a soft IP spec and the other was a hard IP spec.

SLD: How far did it get?
Werner: The hard IP spec is in wide use. TSMC was an early adopter. It really is a text string put on the text layer of a GDS. Any back-end tool that can read the GDS can read the back-end field and determine where this IP came from.

SLD: While IP may adhere to standards, a lot of it isn’t characterized effectively. Will this help?
Werner: Not initially. The tagging tries to define the ownership and the origin. There are additional fields for the size and there are user-defined fields where you can put the process. It’s not going to be complete, but for the hard IP this information travels with it. There isn’t anything about interference or cross-coupling.

SLD: How about for the soft tagging?
Werner: The intent was to track the IP that went through the design flow. You have RTL here. It went through synthesis on this date, for example, using this company’s tool. That really depended on all the EDA tools that touched the tag. If one tool didn’t do that you lost all your tags, so needless to say soft tagging never got going. That left a huge gap. Whenever a vendor delivers IP you lose all control of it. It can be copied and used someplace else and you don’t know. Being able to tie it to the source, to where it’s used, and to the royalties constitute a first step.

SLD: So no matter where IP comes from or where it gets used—whether it’s in the United States or China or Taiwan or some other country—at least we know where it’s from, right?
Werner: Yes, right up front.

SLD: But what’s missing is still other information, such as how it reacts to physical effects. Will that be provided in the future?
Werner: That gets into the hard-tagging spec, and should we revisit issues that are more relevant now than they were five to eight years ago? Probably, but it’s not being considered right now.

SLD: Who would drive that effort?
Werner: When the VSI Alliance folded, it donated its tagging specs to Accellera. They are in the public domain and they’re freely available to anyone who wants to use them. But with any standard effort, it will be the pull of the users.

SLD: How about IP-XACT? Is that comprehending the tagging?
Werner: We’re proposing that now. Nothing has been finalized.

SLD: What is the next big challenge in tagging?
Werner: From my viewpoint, the big issue is figuring out the tagging for soft IP. That’s what we’re trying to drive forward. It’s becoming a bigger issue and a lot of people have a lot of different views on this. For example, the FPGA companies are moving more and more into IP. Historically, they have given away IP to sell silicon. But the IP is getting so complex and expensive that it’s no longer a sustainable model. Now they need to know who’s using their IP so they can collect royalties.

SLD: Who’s backing this move?
Werner: Any vendor with an IP royalty model should be all over this.

SLD: How do the tags work?
Werner: Here’s one implementation: If you end up with text on GDS, it supports and enables honest users. It can be deleted, so you’re assuming people want to do the right thing. But if the tag is in the GDS, you can still get the information about ownership.

SLD: Is that robust enough?
Werner: That’s something we’ve been discussing. Should the tag be a watermark or should it be encrypted? We’re still looking for industry input on that.

SLD: Doesn’t it also protect the company that uses the IP from liability issues?
Werner: Yes, absolutely. And having some way of identifying the version of IP helps with bugs. You know which products are going to be affected. If you tape out version 1.0 and you have a derivative design that uses a later version of IP, you know which version is going to be affected.

SLD: Where are we now with this effort?
Werner: Accellera has been working on this for several months. An IP provider is going to have a different view than a semiconductor company like Freescale, which is going to have a different view than an FPGA vendor. We’re trying to get all these inputs to really scope out what needs to be done.

SLD: Why is Freescale involved?
Werner: We have been using the hard-tagging specs internally. We tag our libraries. But like any company we’re using more and more third-party IP. We want to make sure we’re legally compliant and have a data-driven approach to tracking that IP. Now there are spreadsheets and bills of materials, but anything with that much human intervention is prone to errors.

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