It’s Time to Bring GDS “Reality” Into Routing Closure

By Nancy Nguyen and Jean-Marie Brunet
Imported cells, whether macros, standard cells, or intellectual property (IP), are a common element of today’s integrated circuit (IC) designs. Historically, when designers incorporate these cells into a design, they import them using an abstract format defined by a layout exchange format (LEF) file. This abstract view provides basic information about the cell, such as the place and route (P&R) boundary, the pin access points, and the cell’s rough blockage within the macro (per layer). While this level of physical abstraction has been the foundation of the ASIC model for many years and many nodes, it is facing serious challenges at today’s leading-edge design nodes.

Using LEF files during P&R provides fast verification checking at the expense of detail. Most P&R tools use an abridged set of design rule checks (DRC) that reference the simplified data available from a LEF file to automatically detect and correct basic DRC errors. Once the layout is complete, it is streamed out to a graphic data system (GDS) file, and a full signoff verification run is completed. During this run, the abstract LEF view of the imported cell is replaced by the fully detailed GDS view, and any DRC errors not caught by the abridged DRC set are highlighted for correction. This process worked well when rules were relatively simple, and macros were well-defined.

New design rules require accurate, detailed information about the contents of imported cells, making it extremely difficult, if not impossible, to rely solely on the LEF representation for accurate verification during P&R. For example, multi-layer rules and middle of line (MOL) layer rules that control deep layers in a cell cannot access the needed design data from a LEF file. Multi-patterning requirements impose color restrictions on access pins that can be affected both by placement and distance from other cells, information not typically provided by a LEF file. A new approach that provides more detailed information about the cell’s contents and surroundings is needed to ensure verification does not become a time-consuming series of sign-off DRC runs and debugging.

Obviously, if design teams attempted to use GDS views during P&R for an entire design, the database would very quickly become extremely large and difficult to manage efficiently, slowing down the process flow. However, a new technique that holds promise for resolving this issue is the selective introduction of GDS views during the engineering change order (ECO) routing closure process. By accessing the detailed GDS view and a signoff DRC engine for specific cells affected by these new and more complex design rules, the ECO routing closure can identify and correct the majority of significant DRC issues, while not significantly extending the time required for P&R.

To maintain the “hands-off” efficiency and speed of the P&R process, the ECO closure solution must have enough built-in intelligence to determine which cells require a GDS view, and to analyze the sign-off violations to determine appropriate fixes. Making the cell selection automatic, and transparent to the design team, ensures that the process flow is unchanged from their perspective.

Post-layout, full signoff DRC runs still ensure DRC-clean, signoff-ready GDS files, without a major increase in verification schedules, ensuring design teams meet their time to market targets while delivering designs that comply with all manufacturing requirements.

—Nancy Nguyen is a Technical Marketing Engineer for Design for Manufacturing (DFM) and Place-and-Route Integration in the Design-to-Silicon division of Mentor Graphics.