Lithography-Enabled Scaling Challenges

The shift to materials-enabled 3D devices requires further innovation in precision materials engineering.


The semiconductor industry is being challenged as never before when it comes to lithography-enabled scaling. While development of new patterning techniques and resists as well as inspection and metrology capabilities have helped device scaling advance, major issues continue to challenge the future of Moore’s Law. There’s an industry shift from lithography-enabled 2D devices to materials-enabled 3D devices. The emerging complex device structures and new materials are prompting the need for further innovations in Precision Materials Engineering.

Applied Materials technologists will discuss important work they are doing to help address key scaling issues with mask and wafer patterning, inspection and metrology at the upcoming 2014 SPIE Advanced Lithography Conference taking place Feb.  23 – 27 in San Jose, California. Below is an overview of Applied Materials’ participation at SPIE. To register and join the conversation, visit the SPIE Web site.

Sunday, Feb. 23
8:30 a.m. – 12:30 p.m.
Metrology Toolset Monitoring, Matching, Maintenance and Management (SC1133)
Course Instructors: Eric Solecky, IBM Corp.; Ofer Adan, Applied Materials, Inc.

Monday, Feb. 24
11:50 a.m. – 12:20 p.m.
Session 1: Keynote Session
Addressing emerging challenges in advanced patterning, interconnect, and 3D device integration Paper 9050-2
Author: Ofer Adan, Applied Materials, Inc.

2:20 p.m. – 2:50 p.m.
Session 1: Reviews and Overviews of Nano Patterning Challenges
Where is plasma patterning going from here? Paper 9054-2
Author: Ying Zhang, Applied Materials, Inc.

2:10 p.m. – 2:30 p.m.
Session 2: Hybrid and Virtual Metrology Techniques
New techniques in large-scale metrology toolset data mining to accelerate integrated chip technology development and increase manufacturing efficiencies Paper 9050-5
Author(s): Eric Solecky, Narender Rana, Carol Gustafson, Allan Minns, IBM Corp.; Paul A. Llanos, Roger Cornell, Applied Materials, Inc.

2:50 p.m. – 3:10 p.m.
Session 2: Hybrid and Virtual Metrology Techniques
CD-SEM AFM hybrid metrology for the characterization of gate-all-around silicon nanowires Paper 9050-7
Author(s): Shimon Levi, Applied Materials, Inc.; Sean Hand, Bruker Nano Inc.; Guy M. Cohen, IBM Thomas J. Watson Research Ctr.

4:40 p.m. – 5:00 p.m.
Session 3: Metrology of 3D Structures
Addressing FinFET challenges in 1Xnode by image-based 3D metrology using CD-SEM tilt beam Paper 9050-11
Author(s): Xiaoxiao Zhang, Alok Vaid, Deepasree Konduparthi, Carmen Osorio, GLOBALFOUNDRIES Inc.; Hua Zhou, Zhenhua Ge, Applied Materials, Inc.; Stefano Ventola, Applied Materials GmbH; Roi Meir, Ori Shoval, Roman Kris, Ofer Adan, Maayan Bar-Zvi, Applied Materials, Inc.

Tuesday, Feb. 25
11:30 a.m. – 11:50 a.m.
Session 5: SEM Simulation and Emulation II: Joint Session with Conferences 9050 and 9051
SEM Simulation for 2D and 3D Metrology and Defect Review Paper 9051-10
Author(s): Ofer Adan, Kfir Dotan, Shimon Levi, Ishai Schwarzband, Maayan Bar-Zvi, Applied Materials, Inc.

5:00 p.m. – 7:00 p.m.
Convention Center 220A
Panel Discussion on Alternative Forms of Scaling: Moderator: Christopher Bencher, Applied Materials, Inc.

Panelists: Johann Alsmeier, SanDisk Corp.; Liam Madden, Xilinx Inc.; Kunal Parekh, Micron Technology, Inc.; Michael Van Buskirk, Adesto Technologies, Inc.
6:00 p.m. – 8:00 p.m.
Poster Session
EUV blank mask inspection using 193nm inspector Paper 9048-110
Author(s): Paul Morgan, Daniel Price, MP Mask Technology Ctr., LLC; Yulian Wolff, Pinkesh Shah, Dax Olivera, Lior Shoval, Applied Materials, Inc.

7:45 p.m. – 9:00 p.m.
Joint Panel Discussion on The Battle for the 7nm Node: What are the Non-EUV Solutions?
Convention Center 220A
Moderators: Will Conley, Cymer, Inc.; Kafai Lai, IBM Corp

Wednesday, Feb. 26
5:20 p.m. – 5:40 p.m.
Session 11: Advanced Patterning Processes
Novel and cost-effective multiple patterning technology by means of invisible SiOxNy hardmask Paper 9051-34
Author(s): Linus Jang, Young Joon Moon, Ryoung-Han Kim, GLOBALFOUNDRIES Inc.; Christopher Bencher, Peng Xie, Huixiong Dai, Daniel Diehl, Yong Cao, Applied Materials, Inc.

6:00 p.m. – 8:00 p.m.
Poster Session: Design-Process-Technology Co-optimization for Manufacturability VIII
Fast lithographic hotspot identification and monitoring Paper 9053-34
Author(s): Aviram Tam, Clare Wu, Sivan Lifschitz, Applied Materials, Inc.

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