Two of the approaches electronic-photonic circuit simulations can account for Monte Carlo process parameter variations during the design stage.
Silicon photonics (SiPh) refers to the enablement of photonic integrated circuits (PIC) over silicon wafer. SiPh enables compatibility with existing CMOS manufacturing infrastructure for large-scale integration and brings the associated benefits to the photonics, namely, lower footprint, lower thermal effects, and co-packaging of electronics and photonics on the same chip. One of the side-effects of nanometer regime scaling in modern semiconductor technologies is that the impact of local (i.e., within die) variations has increased; and, efforts to reduce manufacturing variations can impose capital-intensive penalties. With the process nodes becoming smaller, corner design approaches, typically used in digital (electronic) designs, alone are not sufficient. This is especially true for the photonic designs which are more analog-like. As a result, PIC designers are tasked with the inclusion of stochastic nature of process variations into their design process and finding ways of minimizing the impact. Process parameter variations can be included as part of the electronic-photonic design automation (EPDA) in Synopsys OptoCompiler-OptSim. We begin by a high-level classification of process variations. Next, we describe two of the approaches electronic-photonic circuit simulations can account for Monte Carlo process parameter variations during the design stage. Two case studies are presented as illustrations of each approach.
Author:
Jigesh K. Patel
Technical Marketing Manager,
Custom Design and
Manufacturing
Group, Synopsys
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