Learn how electronic analysis and simulation tools can solve 3D-IC and 5nm challenges.
It seems like just yesterday when engineers were trying to fit all the functionality they could onto a monolithic 2D integrated circuit to maximize computing performance. Moore’s Law was going strong and standard chips were what everybody used.
The Design Automation Conference (DAC) 2022, scheduled for July 10 to 14 in San Francisco, will show just how far we’ve come from those days. We’ve left the planar 2D surface to stack ICs in 2.5D or 3D and get more computing power from the available real estate. Node sizes are headed to 5nm and below, and system companies are investing heavily in tailor-made (bespoke) silicon that offer unique performance properties to meet ever-increasing demands for differentiation.
Ansys invites you to leave overdesign and guard-banding behind and “Take a Leap of Certainty” by learning about the latest multiphysics analysis software to help you solve your 3D-IC and 5nm challenges, including power integrity signoff, dynamic voltage drop (DVD) coverage, thermal signoff, chip-package-PCB co-design, advanced 2.5D/3D optimization, and photonic design. Visit us at DAC in booth #1539 to talk to Ansys experts about your unique challenges and how Ansys Multiphysics golden signoff can help you to overcome them.
Multiphysics solutions are the key here. With so much high-speed electronics crammed into such small volumes inside computers, automobiles, cell phones, and data centers these days, a wide array of physics need to be simulated right from the start. For example, thermal overheating is a critical consideration from the earliest RTL floorplanning steps, and electromagnetic coupling/interference determine the performance of many high speed digital, photonic, and analog interconnects between chiplets and within the package. Advanced silicon processes dramatically increase the timing impact of dynamic voltage drop and workflows are needed to effectively fix DVD without blowing up timing. Read more about this in our Ansys blog. A simulation software company without the full chip to package to system reach will not be able to solve these problems in isolation. Ansys has all the open and extensible multiphysics platforms you need to access all relevant physics and handle even the toughest of today’s challenges.
Ansys will be featuring its full range of electronic analysis and simulation tools that are recognized as golden signoff by customers and major foundries alike. Ansys power integrity analysis on display stretches from PowerArtist for RTL power reduction, through RedHawk-SC for digital signoff and Totem for analog signoff. RedHawk-SC Security offers unique capabilities for measuring hardware security vulnerabilities while RedHawk-SC Electrothermal provides a multiphysics signoff platform for 2.5D/3D-IC designs including access to solvers for chip/package co-simulation of fluid dynamics (cooling), mechanical for stress/warpage, interposer signal integrity and full system thermal analysis. RaptorX, HFSS and Ansys Lumerical deliver a comprehensive analysis and optimization suite for high-speed electromagnetic and photonic signals.
Besides booth consultations, Ansys experts will be speaking, participating in roundtable discussions, and presenting posters on many of the latest challenges in the industry. Ansys CTO Prith Banerjee will be part of the Research Panel discussing “What are the big Opportunities in the Next Renaissance of EDA?” on July 12. Norman Chang, Ansys Fellow & Chief Technologist in the Electronics and Semiconductor business unit will speak in the “New Directions in Silicon Solutions” Engineering Track session.
Of particular interest is the DAC Pavilion panel discussion “Bespoke Silicon — Tailor Made for Maximum Performance” moderated by John Lee, General Manager and Vice President of the Ansys Semiconductor business unit. Off-the-shelf silicon is no longer sufficiently differentiating and now system companies are developing their own chips and 3D-IC systems with enhanced properties for their exclusive use. Representatives from Microsoft, Google, and Cadence Design Systems will fill out the panel to discuss this new market and its potential to change the IC business. This topic is revolutionizing the IC industry, so don’t miss this discussion.
Ansys will also be hosting a series of Customer Workshops at DAC that allow customers listen and interact with other customers presenting their latest real-world projects and experiences. Each Workshop has a technical theme with multiple presentations. Visit the Ansys DAC page or contact your local Ansys support to register.
Finally, Ansys and co-sponsor Synopsys are inviting DAC attendees to a Breakfast Event panel discussion before the exhibit opens on July 12 at 7 a.m. Industry expert panelists will discuss “Designing 3D-ICs in a 2D World” while a sit-down breakfast is served. Seats are limited, so register soon!
To learn more about Ansys’ participation in DAC 2022 and to request a private meeting with Ansys experts or a software demo, visit our “Take a Leap of Certainty at DAC 2022” page. We’re looking forward to seeing you there!
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