An in-depth look at the high-speed data communication standard’s benefits and tradeoffs.
Pulse amplitude modulation (PAM) is already a widely adopted technology in high-speed digital communications. But to understand why it has become ubiquitous in serial data standards, you first must understand the market forces driving the data networking industry. In this article, I will explore PAM4 in-depth, from its benefits and potential tradeoffs to why it was an essential innovation that enabled today’s emerging technologies. You will also learn how to develop with PAM4 by testing and measuring it with the right tools.
Emerging, data-intensive technologies like artificial intelligence and machine learning are gaining popularity. Data centers, which act as the essential infrastructure for these technologies, need to scale efficiently to process and run the algorithms. In the last decade, the networking industry developed multiple innovations to meet exponential data processing demands, including moving from electrical to optical cables and developing faster data standards.
Faster data standards decrease latency and increase processing speeds in data center servers, but complex physics challenges exist when defining faster data protocols. At the physical layer, signals running through electrical channels like PCB traces and server interconnects start to hit a bandwidth limit of 25 Gb/s. The faster a signal transmits through a channel, the more it is affected by signal integrity issues, which limit the channel’s bandwidth, distorting the signal with noise, jitter, and other impairments that make the signal more difficult for the receiver to interpret. The channel insertion loss becomes too high at this frequency to maintain a recoverable bit error rate.
At the time, the only way to transition from 100G Ethernet to 400GE networks was to increase the number of 25 Gb/s channels from four lanes to sixteen. However, this would have been physically unwieldy and expensive to implement for every server and port in a data center. In 2017, the IEEE solved this issue with the 802.3bs standard, which defined 200GE and 400GE networks over four and eight 56 Gb/s lanes (28 GBaud PAM4), respectively.
PAM4 is a four-level pulse amplitude-modulated signal, which can be electrical or optical. Traditionally, digital signals are encoded for transmission in two levels, 0 and 1. Previous generations of serial data standards used non-return-to-zero (NRZ) encoding, rendering bits distinct high- and low-voltage signals with little transition time between them. In theory, this looks like a square wave, but on an oscilloscope, signals have a transition time between clock cycles.
Fig.1: NRZ signal (top) and eye diagram (bottom).
Pulse amplitude modulation builds upon this concept by encoding data across multiple voltage levels. PAM4 uses four levels. A PAM4 signal can appear as one of four voltages during each clock cycle, each voltage level representing two bits of data rather than a single bit like an NRZ-encoded signal.
Fig.2: PAM4 signal (top) and eye diagram (bottom).
The developers working on the IEEE standard used the Shannon-Hartley theorem to discover that they could increase channel data capacity (C) without increasing the channel bandwidth (B) by increasing the modulation level of the signal (M).
C = 2*B*log2(M)
The PHY circuit of a chip encodes serial data into specific voltages for transmission. An NRZ-encoding PHY might take each bit and simply output every “0” as 0 V and every “1” as 5 mV, although more complex encoding schemes exist. Conversely, a PAM4-encoding PHY might take every two bits of data grouped and encode them as: “00” = -5 mV, “01” = -1.5 mV, “10” = 1.5 mV, and “11” = 5 mV. The device at the other end of the channel receives the signal, understanding that 1.5 mV should be decoded as the bits “1” and “0,” and so on.
The most significant advantage of PAM4 is the increase in data rate. The data rate of a PAM4 signal is equal to twice the baud rate, or symbol rate, as each “symbol” contains two bits. Therefore, you get twice as much data capacity without increasing the transmitter’s speed or losing the signal to insertion loss. With this advantage comes the need for fewer lanes in optical transceivers, cables, and interconnects; an 800GE network can be carried by eight 100 Gb/s (50 GBaud PAM4) lanes rather than sixteen 50 Gb/s NRZ lanes.
On the other hand, there are some disadvantages to PAM4. PAM4 devices are far more susceptible to noise than NRZ devices because four signal levels are packed into the same amplitude swing of two levels. Each level has a specific voltage threshold that a receiver uses to interpret the value of a symbol. PAM4 thresholds are inherently smaller than NRZ thresholds, and any vertical noise or timing jitter can cause the signal to fall outside the suitable thresholds.
Fig.3: Noise margins reduce as the modulation level increases.
Developers can overcome this disadvantage by filtering, using decision feedback equalization (DFE), or implementing forward error correction (FEC). FEC adds redundant data to serial bitstreams using specialized error-correcting code algorithms to ensure that the receiver can reconstruct the data accurately, reducing the bit error rate to comply with test specifications.
The drawback of FEC is that the redundant bits use the same channel as the protocol data, slightly decreasing the data rate. Also, the DSPs that encode and decode the data use processing power, as does the equalization required to maintain signal integrity at high speeds. Power consumption and heat dissipation are significant concerns for data center developers and networking equipment manufacturers. Nevertheless, FEC lessens some of the challenges of maintaining the signal integrity of PAM4-encoded signals.
PAM4 has been adopted by multiple digital data standards, such as the IEEE 802.3 and OIF-CEI Ethernet standards. Since then, PAM4 has become a part of other communication standards. PCIe® 6.0 adopted PAM4 in 2022. The USB-IF recently dipped its toes in the pulse amplitude modulation waters with USB4 Version 2.0, which uses PAM3 signaling.
Related technologies push the central idea behind PAM4 to greater heights. Ethernet SERDES leaders have considered PAM6 and PAM8 for transmitting even more bits per symbol, but the noise margins may be too small for this to work. Coherent optics uses quadrature amplitude modulation (QAM), a method of complex modulation that increases transmission speed and efficiency by extending multi-level modulation to two or more dimensions for long-distance optical communication.
With the widespread adoption of multilevel signaling, high-speed digital developers must expand their understanding of measurement science to test their device performance. Not only do PAM4 signals travel at very high baud rates, requiring higher bandwidth instruments to measure them, but the low noise and jitter thresholds require exceptionally low intrinsic noise and jitter in the oscilloscope and probe to measure them accurately.
Developers must perform new transmitter test measurements to characterize PAM4 transmitter devices. The details of these measurements and margin requirements are specific to the data standard but generally include signal-to-noise and distortion ratio (SNDR), rise and fall time, 12-edge jitter, and transmitter dispersion and eye closure quaternary (TDECQ) measurements. Transmitter performance is generally defined by measuring the eye height and width, the main challenge over NRZ being that there are now three eyes to measure rather than one. A “closed eye” occurs when the signal is unreadable due to noise and jitter extending the signal outside its thresholds. Keeping the eye open with FEC and equalization is crucial for developers who want their devices to pass interoperability tests.
Fig. 4: PAM4 noise measurements with the Keysight Infiniium UXR-series real-time oscilloscope.
Measuring today’s 100 Gb/s Ethernet transceiver signals or 64 GT/s PCIe 6.0 signals requires an oscilloscope with at least 50 GHz bandwidth and as high a sample rate and ADC resolution as possible. Keysight Infiniium UXR-B Series oscilloscopes are designed specifically for these types of measurements. Oscilloscope software for PAM signal analysis gives the oscilloscope the tools to make essential measurements for debugging and validating PAM4 devices. It is even future-proofed for research into higher modulation schemes like PAM6 or PAM8.
Receiver testing is more complicated for PAM4 devices. FEC must be considered in PAM4 receiver testing with “FEC-aware” bit error rate testers (BERTs). Other standards, like USB4 Version 2.0, use retimers to maintain signal integrity over long links, so retimer and cable compliance testing must also be performed. Receiver testing requires equipment to generate PAM4 stressed signals to emulate real-world impairments at high data rates and measure errors to determine if the device meets bit error rate requirements. Testing device PHY performance is accomplished by using high-frequency arbitrary waveform generators and BERTs. For optical transceiver testing, multiport network test solutions with Layer 1 BERT, FEC, and Layer 2 support can ease the complexity of testing devices to IEEE and OIF interoperability standards.
PAM4 is now well-established in today’s high-speed data communication standards, with new generations of standards adopting it every year. Every physical layer developer or test engineer needs a firm understanding of the concepts behind PAM4 and how to make the most reliable, accurate measurements using the proper test equipment to get the best insights. Click any links throughout the article to dig deep and learn more about Keysight PAM4 test and measurement solutions.
Additional Resources:
Learn how to test 400G / 800G electrical transmitter conformance.
Learn how to analyze PAM4 receiver signals.
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