A look at the various process and design trends that are increasing the likelihood of EM-induced failure—and what to do about it.
This white paper describes EM integrity analysis for power and signal lines. It outlines the various process and design trends that are increasing the likelihood of EM-induced failures in a design and looks at conventional verification techniques for EM integrity and contrasts those with what is required for advanced process nodes.
To download this paper, click here.
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