Progress Report: Nanoelectronics

By Cheryl Ajluni

In the world of system design, few technologies cut across as many lines as nanotechnology. Whether for use in better, cheaper sunglasses, sunscreen, next-generation body armor or regenerative medicine, its application seems limitless. It is so far reaching in fact that by 2015 some analysts predict the global market for nanotechnology will top $1 trillion.

As Viviane Reding, the European Union’s Commissioner for Information Society and Media, so aptly put it in a 2008 interview, “Today, it is the smallest technologies that are taking the largest leaps forward, and our industries must do the same. The possibilities offered by nanotechnology are only limited by our imagination. They underpin all aspects of everyday devices and so concern everyone in Europe.” These comments still ring true today in Europe and elsewhere around the world, particularly when it comes to nanoelectronics (see Understanding Nanoelectronics below). In this arena, advances continue to come in rapid succession.

At Lawrence Livermore National Laboratory, for example, researchers have devised a versatile hybrid platform that uses lipid-coated nanowires to build prototype bio-nanoelectronic devices. The idea behind this development is simple: to boost the operating efficiency of laptops and other electronic devices by combining manmade devices (nanoelectric transistors) with biological machines.

Research in this area has been ongoing for some time with no real progress. It wasn’t until small nanoparticles the size of biological molecules were created that researchers were finally able to integrate the systems at a more localized level. The bio-nanoelectronic platform that the LLNL team created uses lipid membranes because they can house an unlimited number of protein machines that perform a large number of critical recognition, transport and signal transduction functions in the cell (Figure 1). The membranes were incorporated into silicon nanowire transistors using a shielded-wire approach. In other words, the nanowire was covered with a continuous lipid bilayer shell that formed a barrier between the nanowire surface and solution species. This allowed the team to use membrane pores as the only pathway for the ions to reach the nanowire. The nanowire device monitors specific transport and controls the membrane protein. By changing the gate voltage of the device, the membrane pore could be opened and closed electronically.

Figure 1. This image by Scott Dougerty, LLNL, is a representation of a bioanoelectronic device incorporating an alamethicin biological pore. In the core of the device is a silicon nanowire (grey) covered with a lipid bilayer (blue). The bilayer incorporates bundles of alamethicin molecules (purple) that form pore channels in the membrane. Transport of protons though these pore channels changes the current through the nanowire.

Researchers at Berkeley Lab have been actively investigating a phenomenon known as phase inhomogeneity and how it can be engineered on the sub-micron scale to achieve desired properties like colossal magnetoresistance and high-temperature superconductivity. For the first time, they have been able to show that these highly coveted properties can be generated by applying external stimuli, in this case strain, to a correlated electron material like vanadium oxide (Figure 2). Colossal magnetoresistance occurs when the presence of a magnetic field increases electrical resistance by orders of magnitude. High-temperature superconductivity occurs when the materials lose all electrical resistance at temperatures much higher than conventional superconductors.

According to Junqiao Wu, a physicist with Berkeley Lab’s Materials Sciences division, “By continuously tuning strain over a wide range in single-crystal vanadium oxide micro- and nano-scale wires, we were able to engineer phase inhomogeneity along the wires. Our results shed light on the origin of phase inhomogeneity in correlated electron materials in general, and open opportunities for designing and controlling phase inhomogeneity of correlated electron materials for future devices.”

Figure 2. These optical images of a multiple-domain vanadium oxide microwire taken at various temperatures show pure insulating (top) and pure metallic (bottom) phases, and co-existing metallic/insulating phases (middle) as a result of strain engineering. Images courtesy of Junqiao Wu.

Nanoelectronics around the world

The discoveries made by researchers at Lawrence Livermore Labs and Berkeley Labs represent just the tip of the iceberg in terms of what’s going on, at a global level, in nanoelectronics today. Despite a tough economic climate, countries and companies around the world are still investing time and money into this potentially lucrative technology.

One such effort comes from CEA/Leti—the Electronics and Information Technology Laboratory of the CEA, based in Grenoble—and IBM. Earlier this year, the two announced a five-year collaboration that will focus on advanced materials, devices and processes for the development of CMOS process technology to be used in the production of microprocessors and integrated circuits at 22 nm and beyond. This collaboration will focus on three key areas: advanced lithography for fast prototyping and 22-nm chip technology, CMOS technologies and low-power devices for 22-nm chip technology and beyond, and technology enablement (e.g., nanoscale characterization techniques for research and monitoring manufacturing protocols).

Additionally, a European initiative aimed at improving engineering efficiency at the nanoscale just recently won funding under the European Union’s Seventh Framework Program. The initiative is being led by a consortium of microelectronics companies like Philips Applied Technologies, Fraunhofer IZM, Infineon, and NXP, as well as research institutions like the Georgia Institute of Technology Lorraine. The project, NanoInterface, hopes to realize a number of scientific, technological and societal advances, including the development of a multiscale design approach for microelectronic materials, a contribution towards the industry’s ‘zero defect’ objectives and the implementation of environmentally-friendly materials. As part of the project, partners will develop a software tool that incorporates chemical, physical and mechanical information from the atomic level directly into macroscopic models. It will be used to enable highly-reliable metal oxide-polymer systems for System in Package (SiP) products and complex micro- and nanoelectronic systems.

Even Saudi Arabia has gotten into the act by collaborating with Synopsys to form a Center of Excellence for Nanoelectronic Design at the King Abdulaziz City of Science and Technology (KACST)—both the Saudi Arabian national science agency and its national laboratories. The goal of the collaboration is to enable the development of a nanoelectronics-based ecosystem in Saudi Arabia. Toward that goal, KACST and Synopsys are working to create a nanotechnology and nanoelectronics infrastructure, state-of-the-art computing environment, electronic design environment, and nanoelectronics design flow. A hub will also be created to provide advanced electronic design automation software and curriculum to Saudi Arabia’s universities and research centers.

Conclusion

Nanotechnology, and in particular, nanoelectronics, is a topic of great importance and urgency these days. The current CMOS transistor architecture is expected to reach its limit some time around 2020. When that day comes, nanoelectronic technologies must be ready for prime time. The extensive research and development projects currently under way around the world will play a critical role in ensuring that goal is realized. While any discoveries may not translate into commercially viable devices just yet, they do serve to advance the study of nanoelectronics and the possible features it may enable in next-generation electronic devices. Whatever today’s researchers develop will undoubtedly end up benefitting the chip industry in ways that can not yet even be imagined.