SEM Analysis Reveals Real Cause Of Chip Failure

In this failure analysis, the shape and magnitude of the curves suggest that MIM caps are shorted.


When it comes to ASIC design, DELTA’s motto is “first time right”. When the first wafers from the wafer fab showed severe electrical malfunction, we were extremely frustrated. To investigate the failure, the design team started electrical characterization of prototypes. Overall, a short between power and ground was observed and furthermore RF inputs exhibited strange VI characteristics. The circuit behavior was analyzed in detail. In order to understand the conducted analysis some background information of the circuit design was necessary. The ASIC was a RFID device. The actual circuit between RFIN1 and RFIN2 is shown in fig. 1. The ASIC was made in three different design variants, type 1, 2 and X. Note that ESD protection circuit does not exist in type X design. Further the 100 KΩ resistor does not exist in the type 2 design.

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