Shifting Left In P&R With In-Design Signoff Fill For Faster And More Accurate Tapeouts

Place and route (P&R) engineers are always on the lookout for ways to optimize their design flows to ensure designs meet their design power, performance, and area (PPA) goals while also hitting tapeout deadlines. The introduction of the Calibre RealTime Digital interface made Calibre nmDRC and Calibre nmDRC Recon design rule checking (DRC) verification available during the P&R process to help design teams find and eliminate critical design errors earlier in the design and verification flow, reducing the signoff DRC iterations needed to achieve signoff and speeding up DRC closure by as much as 2-4x [1,2].

Now, as part of continuing innovation, the Calibre RealTime Digital interface offers P&R engineers the ability to add Calibre-optimized signoff fill during the P&R process (figure 1).

Fig 1: The Calibre RealTime Digital interface enables signoff fill during P&R.

Fill in P&R

Adding inactive metal fill is a mandatory step in the P&R design flow. This fill is intended to create a more even distribution of metal across the die, helping to reduce thickness variations that can affect the results of chemical-mechanical polishing during manufacturing. Traditionally, engineers used the native fill solution of their P&R tool to generate fill during implementation, while running signoff fill solutions outside of P&R on bigger blocks and full-chip designs. However, as more and more companies move to advanced process nodes, there is an increased focus on reducing the number of variables that can impact the PPA metrics. One of these variables includes potential correlation issues between the P&R fill and the signoff fill, because fill mismatches can affect timing. To stave off these types of problems, P&R engineers are now using signoff fill solutions throughout their design flows.

Adding signoff fill in P&R

The Calibre RealTime Digital interface provides push-button access to the Calibre YieldEnhancer with SmartFill functionality in the P&R environment. Because the Calibre RealTime toolbar is integrated within all major design implementation tools, designers can seamlessly launch a Calibre YieldEnhancer signoff SmartFill run with a single mouse-click. Designers have the option of storing the generated fill in a separate GDSII/OASIS file, or back-annotating the fill into the P&R environment. When using the SmartFill signoff fill to run downstream flows such as timing and extraction, designers can either point to the fill file or submit the entire P&R database (including the back-annotated fill) as input to their downstream flows. When running signoff DRC in P&R using the Calibre RealTime Digital interface, designers can check the interaction of the design and fill shapes, and make quick edits to fix any DRC errors without having to exit the P&R environment.

Fig. 2: Invoking Calibre signoff fill insertion in P&R using the Calibre Realtime Digital interface.

Benefits

Multiple design teams in different semiconductor design companies have deployed Calibre RealTime Digital fill solutions across advanced nodes ranging from 16 down to 4nm, with positive results. P&R engineers validated the value of the flow—not only does it simplify generation of Calibre signoff fill throughout the P&R design flow, but they no longer have to worry about correlation or timing issues due to potential mismatches between the P&R and signoff fill solutions.

Moving to a new technology node reveals additional value, given the strong likelihood that a signoff Calibre YieldEnhancer with SmartFill deck will be available for that node, even when the technology file used by the P&R native fill solution is unavailable or out of date. This advantage enables design companies to accelerate their physical verification closure and release their chips to market faster—a significant benefit for companies as they constantly look for ways to increase revenues and/or market share.

Conclusion

The Calibre DRC and fill solutions are industry-leading signoff solutions. The Calibre RealTime Digital interface enables P&R engineers to seamlessly run these solutions throughout the P&R implementation flow with push-button simplicity. They can use the resulting signoff fill in downstream flows (such as extraction and timing) without having to leave the P&R environment. These features enable engineers to focus on meeting design PPA goals without the distractions caused by correlation issues between native P&R and Calibre fill solutions. The advantages of implementing signoff fill solutions during P&R with the Calibre RealTime Digital interface can help companies achieve their design and business objectives while using fewer resources and less time.

References

[1]  Srinivas Velivala, “MaxLinear and Calibre RealTime Digital: Signoff DRC in P&R,” Siemens Digital Industries Software. April 2020.
https://resources.sw.siemens.com/en-US/white-paper-maxlinear-and-calibre-realtime-digital-signoff-drc-in-p-and-r

[2]  Srinivas Velivala, “Qualcomm achieves faster signoff DRC convergence in P&R with Calibre RealTime Digital DRC,” Siemens Digital Industries Software. Dec. 2018.
https://resources.sw.siemens.com/en-US/white-paper-qualcomm-achieves-faster-signoff-drc-convergence-in-p-and-r-with-calibre